sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

167

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

162

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

171

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

180

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

189

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

264

DPSTREAMCLK0_EN, (src == REFCLK) ? 0 : 1,

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

269

DPSTREAMCLK1_EN, (src == REFCLK) ? 0 : 1,

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

274

DPSTREAMCLK2_EN, (src == REFCLK) ? 0 : 1,

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

279

DPSTREAMCLK3_EN, (src == REFCLK) ? 0 : 1,

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

305

dccg314_set_dpstreamclk(dccg, REFCLK, otg_inst,

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

161

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

170

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

179

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

188

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

292

(src == REFCLK) ? 0 : 1, DPSTREAMCLK0_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

296

(src == REFCLK) ? 0 : 1, DPSTREAMCLK1_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

300

(src == REFCLK) ? 0 : 1, DPSTREAMCLK2_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

304

(src == REFCLK) ? 0 : 1, DPSTREAMCLK3_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1318

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1327

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1336

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1345

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1459

(src == REFCLK) ? 0 : 1, DPSTREAMCLK0_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1461

REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK0_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1465

(src == REFCLK) ? 0 : 1, DPSTREAMCLK1_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1467

REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK1_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1471

(src == REFCLK) ? 0 : 1, DPSTREAMCLK2_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1473

REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK2_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1477

(src == REFCLK) ? 0 : 1, DPSTREAMCLK3_SRC_SEL, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1479

REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, DPSTREAMCLK3_ROOT_GATE_DISABLE, (src == REFCLK) ? 0 : 1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1486

__func__, dp_hpo_inst, (src == REFCLK) ? 0 : 1, otg_inst);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1781

dccg35_set_dpstreamclk(dccg, REFCLK, otg_inst,

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2095

case REFCLK:

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

225

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

234

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

243

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

252

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

584

if (src == REFCLK)

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1189

dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1887

dc->res_pool->dccg->funcs->set_dtbclk_p_src(dc->res_pool->dccg, REFCLK, pipe_ctx->stream_res.tg->inst);