REG_UPDATE_5 - OpenBSD

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_hw.c

180

REG_UPDATE_5(DC_I2C_TRANSACTION0,

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_hw.c

188

REG_UPDATE_5(DC_I2C_TRANSACTION1,

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_hw.c

196

REG_UPDATE_5(DC_I2C_TRANSACTION2,

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_hw.c

204

REG_UPDATE_5(DC_I2C_TRANSACTION3,

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_hw.c

348

REG_UPDATE_5(DC_I2C_CONTROL,

sys/dev/pci/drm/amd/display/dc/dce/dce_i2c_hw.c

51

REG_UPDATE_5(DC_I2C_CONTROL,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

1029

REG_UPDATE_5(HDMI_CONTROL,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

1421

REG_UPDATE_5(DP_SEC_CNTL,

sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c

562

REG_UPDATE_5(HDMI_CONTROL,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.c

72

REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1,

sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.c

96

REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1046

REG_UPDATE_5(HDMI_CONTROL,

sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1411

REG_UPDATE_5(DP_SEC_CNTL,

sys/dev/pci/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c

84

REG_UPDATE_5(MPCC_CONTROL[mpcc_id],

sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1172

REG_UPDATE_5(OTG_TEST_PATTERN_PARAMETERS,

sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1182

REG_UPDATE_5(OTG_TEST_PATTERN_PARAMETERS,

sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1192

REG_UPDATE_5(OTG_TEST_PATTERN_PARAMETERS,

sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

947

REG_UPDATE_5(OTG_V_TOTAL_CONTROL,

sys/dev/pci/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

96

REG_UPDATE_5(OTG_GSL_CONTROL,

sys/dev/pci/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

76

REG_UPDATE_5(OTG_V_TOTAL_CONTROL,