Symbol: REG_UPDATE_3
sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
600
REG_UPDATE_3(OTG_PIXEL_RATE_CNTL[params->otg_inst],
sys/dev/pci/drm/amd/display/dc/dce/dce_ipp.c
96
REG_UPDATE_3(CUR_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c
437
REG_UPDATE_3(DP_LINK_FRAMING_CNTL,
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c
490
REG_UPDATE_3(DP_LINK_FRAMING_CNTL,
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c
526
REG_UPDATE_3(DP_LINK_FRAMING_CNTL,
sys/dev/pci/drm/amd/display/dc/dce/dce_link_encoder.c
554
REG_UPDATE_3(DP_LINK_FRAMING_CNTL,
sys/dev/pci/drm/amd/display/dc/dce/dce_mem_input.c
153
REG_UPDATE_3(DVMM_PTE_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_mem_input.c
221
REG_UPDATE_3(DPG_PIPE_NB_PSTATE_CHANGE_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_mem_input.c
240
REG_UPDATE_3(DPG_PIPE_NB_PSTATE_CHANGE_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_mem_input.c
253
REG_UPDATE_3(DPG_PIPE_LOW_POWER_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
109
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
118
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
124
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
134
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
204
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
209
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
274
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
284
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
306
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
315
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
326
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
344
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
476
REG_UPDATE_3(FMT_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_opp.c
491
REG_UPDATE_3(FMT_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
1036
REG_UPDATE_3(HDMI_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
1282
REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
206
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL0,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
212
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL0,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
218
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL1,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
224
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL1,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
231
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
238
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
245
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL3,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
252
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL3,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
557
REG_UPDATE_3(HDMI_CONTROL,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
629
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dcn201/dcn201_mpc.c
56
REG_UPDATE_3(MUX[opp_id],
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
369
REG_UPDATE_3(DP_LINK_FRAMING_CNTL,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
405
REG_UPDATE_3(DP_LINK_FRAMING_CNTL,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
1268
REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
188
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL0,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
194
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL0,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
200
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL1,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
206
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL1,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
212
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
218
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
224
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL3,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
230
REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL3,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
581
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
393
REG_UPDATE_3(DP_SEC_METADATA_TRANSMISSION,
sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c
398
REG_UPDATE_3(HDMI_METADATA_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
686
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
774
REG_UPDATE_3(HDMI_ACR_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
251
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c
209
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
197
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
209
REG_UPDATE_3(HDMI_VBI_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
811
REG_UPDATE_3(DP_SEC_METADATA_TRANSMISSION,
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
816
REG_UPDATE_3(HDMI_METADATA_PACKET_CONTROL,
sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c
850
REG_UPDATE_3(
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c
354
REG_UPDATE_3(CURSOR0_CONTROL,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
399
REG_UPDATE_3(CURSOR0_CONTROL,
sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
106
REG_UPDATE_3(CURSOR0_CONTROL,
sys/dev/pci/drm/amd/display/dc/gpio/hw_ddc.c
174
REG_UPDATE_3(ddc_setup,
sys/dev/pci/drm/amd/display/dc/gpio/hw_ddc.c
183
REG_UPDATE_3(ddc_setup,
sys/dev/pci/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c
70
REG_UPDATE_3(DP_DPHY_SYM32_CONTROL,
sys/dev/pci/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c
293
REG_UPDATE_3(DP_SYM32_ENC_VID_PIXEL_FORMAT,
sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c
1185
REG_UPDATE_3(CURSOR_CONTROL,
sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
316
REG_UPDATE_3(DCSURF_ADDR_CONFIG,
sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
670
REG_UPDATE_3(DMDATA_CNTL,
sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
689
REG_UPDATE_3(DMDATA_SW_CNTL,
sys/dev/pci/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
600
REG_UPDATE_3(DCSURF_FLIP_CONTROL,
sys/dev/pci/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c
330
REG_UPDATE_3(DCSURF_TILING_CONFIG,
sys/dev/pci/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c
396
REG_UPDATE_3(DMDATA_CNTL,
sys/dev/pci/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c
76
REG_UPDATE_3(HUBPRET_CONTROL,
sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
103
REG_UPDATE_3(HUBP_3DLUT_CONTROL,
sys/dev/pci/drm/amd/display/dc/hwss/dce/dce_hwseq.c
130
REG_UPDATE_3(BLND_CONTROL[blnd_inst],
sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
126
REG_UPDATE_3(DMU_CLK_CNTL,
sys/dev/pci/drm/amd/display/dc/opp/dcn10/dcn10_opp.c
171
REG_UPDATE_3(FMT_CONTROL,
sys/dev/pci/drm/amd/display/dc/opp/dcn10/dcn10_opp.c
178
REG_UPDATE_3(FMT_CONTROL,
sys/dev/pci/drm/amd/display/dc/opp/dcn10/dcn10_opp.c
184
REG_UPDATE_3(FMT_CONTROL,
sys/dev/pci/drm/amd/display/dc/opp/dcn10/dcn10_opp.c
54
REG_UPDATE_3(FMT_BIT_DEPTH_CONTROL,
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
1259
REG_UPDATE_3(OTG_STEREO_CONTROL,
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
1505
REG_UPDATE_3(OTG_CRC_CNTL,
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
1532
REG_UPDATE_3(OTG_CRC_CNTL,
sys/dev/pci/drm/amd/display/dc/optc/dcn30/dcn30_optc.c
88
REG_UPDATE_3(OTG_GLOBAL_CONTROL0,
sys/dev/pci/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
228
REG_UPDATE_3(OTG_CRC_CNTL,
sys/dev/pci/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
261
REG_UPDATE_3(OTG_CRC_CNTL,
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c
152
REG_UPDATE_3(DMU_CLK_CNTL,