sys/dev/pci/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

587

REG_SET_5(DSCCIF_CONFIG0, 0,

sys/dev/pci/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

680

REG_SET_5(DSCC_PPS_CONFIG11, 0,

sys/dev/pci/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

705

REG_SET_5(DSCC_PPS_CONFIG15, 0,

sys/dev/pci/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

301

REG_SET_5(DSCC_PPS_CONFIG11, 0,

sys/dev/pci/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

326

REG_SET_5(DSCC_PPS_CONFIG15, 0,

sys/dev/pci/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

81

REG_SET_5(DCHUBP_REQ_SIZE_CONFIG, 0,

sys/dev/pci/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

88

REG_SET_5(DCHUBP_REQ_SIZE_CONFIG_C, 0,

sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

240

REG_SET_5(DCHUBP_REQ_SIZE_CONFIG_C, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

201

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

259

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

232

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

77

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

169

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

89

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

233

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

84

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

97

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

147

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,

sys/dev/pci/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

273

REG_SET_5(OPTC_DATA_SOURCE_SELECT, 0,