sys/dev/pci/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

521

REG_GET_4(DP_SYM32_ENC_SDP_AUDIO_CONTROL0,

sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

901

REG_GET_4(DCN_EXPANSION_MODE,

sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1142

REG_GET_4(DCN_EXPANSION_MODE,

sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

1375

REG_GET_4(DCN_EXPANSION_MODE,

sys/dev/pci/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c

269

REG_GET_4(DCN_EXPANSION_MODE,

sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

833

REG_GET_4(DCN_EXPANSION_MODE,

sys/dev/pci/drm/amd/display/dc/hwss/dce/dce_hwseq.c

60

val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst],

sys/dev/pci/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c

452

REG_GET_4(MPCC_CONTROL[mpcc_inst], MPCC_MODE, &s->mode,

sys/dev/pci/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c

553

REG_GET_4(MPCC_CONTROL[mpcc_inst], MPCC_MODE, &s->mode,

sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

1482

REG_GET_4(MPCC_CONTROL[mpcc_inst], MPCC_MODE, &s->mode,