sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6519

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6562

tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6817

tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3733

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3773

tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4141

tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2729

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3021

tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4243

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3404

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

421

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

839

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1086

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

919

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, size);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1134

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

970

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1132

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2078

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, tmp);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

953

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1114

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1304

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1527

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1139

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1330

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1520

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, tmp);

sys/dev/pci/drm/radeon/evergreen.c

2977

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));

sys/dev/pci/drm/radeon/r600.c

2658

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));

sys/dev/pci/drm/radeon/rv770.c

1102

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));