sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6520

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6563

tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6818

tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3734

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3774

tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

4142

tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

2730

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

3022

tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4244

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3405

tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

422

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

840

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1087

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1135

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

971

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1133

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2079

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

954

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1115

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1305

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1528

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1140

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1331

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1521

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1);

sys/dev/pci/drm/radeon/evergreen.c

2977

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));

sys/dev/pci/drm/radeon/r600.c

2658

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));

sys/dev/pci/drm/radeon/rv770.c

1102

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));