sys/dev/pci/drm/radeon/radeon_clocks.c

488

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

490

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

532

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

549

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

566

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

580

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

584

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

603

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

62

post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;

sys/dev/pci/drm/radeon/radeon_clocks.c

640

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

656

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

721

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

724

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

753

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

771

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

826

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

834

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

837

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

846

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

881

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

890

WREG32_PLL(RADEON_SCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

926

tmp = RREG32_PLL(RADEON_SCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

951

WREG32_PLL(RADEON_SCLK_CNTL, tmp);