R92C_APS_FSMCO
rtwn_pci_write_1(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_PDN_EN);
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_OFF);
if ((rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_2(sc, R92C_APS_FSMCO, rtwn_pci_read_2(sc, R92C_APS_FSMCO) |
rtwn_pci_write_2(sc, R92C_APS_FSMCO, rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_4(sc, R92C_APS_FSMCO,
rtwn_pci_read_4(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_RDY_MACON);
rtwn_pci_write_4(sc, R92C_APS_FSMCO,
rtwn_pci_read_4(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APDM_HPDN);
if (rtwn_pci_read_1(sc, R92C_APS_FSMCO) &
reg = rtwn_pci_read_4(sc, R92C_APS_FSMCO);
rtwn_pci_write_4(sc, R92C_APS_FSMCO, reg);
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & (~R92C_APS_FSMCO_APDM_HPDN));
if (rtwn_pci_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_1(sc, R92C_APS_FSMCO,
rtwn_pci_read_1(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_PDN_EN);
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APFM_RSM);
if (rtwn_pci_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
rtwn_pci_write_4(sc, R92C_APS_FSMCO, rtwn_pci_read_4(sc, R92C_APS_FSMCO) |
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
rtwn_pci_write_2(sc, R92C_APS_FSMCO,
rtwn_pci_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(rtwn_pci_read_2(sc, R92C_APS_FSMCO) &
sc->sc_dev.dv_xname, rtwn_pci_read_2(sc, R92C_APS_FSMCO));
if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN)
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_write_4(sc, R92C_APS_FSMCO,
urtwn_read_4(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_RDY_MACON);
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(urtwn_read_2(sc, R92C_APS_FSMCO) &
if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APFM_RSM);
if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_AFSM_HSUS);
urtwn_write_2(sc, R92C_APS_FSMCO,
urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(urtwn_read_2(sc, R92C_APS_FSMCO) &