sys/dev/pci/drm/radeon/radeon_clocks.c

689

tmp = RREG32_PLL(RADEON_MCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

704

tmp = RREG32_PLL(RADEON_MCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

719

WREG32_PLL(RADEON_MCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

896

tmp = RREG32_PLL(RADEON_MCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

901

WREG32_PLL(RADEON_MCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_clocks.c

92

post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;

sys/dev/pci/drm/radeon/radeon_clocks.c

966

tmp = RREG32_PLL(RADEON_MCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_clocks.c

969

WREG32_PLL(RADEON_MCLK_CNTL, tmp);

sys/dev/pci/drm/radeon/radeon_combios.c

3156

(RADEON_MCLK_CNTL);

sys/dev/pci/drm/radeon/radeon_combios.c

3159

WREG32_PLL(RADEON_MCLK_CNTL,