sys/arch/arm64/dev/aplpcie.c

115

PWRITE4((sc), (port), (reg), PREAD4((sc), (port), (reg)) | (bits))

sys/arch/arm64/dev/aplpcie.c

117

PWRITE4((sc), (port), (reg), PREAD4((sc), (port), (reg)) & ~(bits))

sys/arch/arm64/dev/aplpcie.c

469

PWRITE4(sc, port, PCIE_PORT_MSI_CTRL,

sys/arch/arm64/dev/aplpcie.c

471

PWRITE4(sc, port, PCIE_PORT_MSI_REMAP, 0);

sys/arch/arm64/dev/aplpcie.c

472

PWRITE4(sc, port, PCIE_PORT_MSI_DOORBELL, sc->sc_msi_doorbell);

sys/arch/arm64/dev/aplpcie.c

478

PWRITE4(sc, port, PCIE_PORT_RID2SID(idx), 0);

sys/arch/arm64/dev/aplpcie.c

552

PWRITE4(sc, port, PCIE_PORT_LTSSM_CTRL, PCIE_PORT_LTSSM_CTRL_START);

sys/arch/arm64/dev/aplpcie.c

590

PWRITE4(sc, port, PCIE_PORT_MSI_CTRL, PCIE_PORT_MSI_CTRL_ENABLE);

sys/arch/arm64/dev/aplpcie.c

592

PWRITE4(sc, port, PCIE_T6020_PORT_MSI_MAP(msi),

sys/arch/arm64/dev/aplpcie.c

594

PWRITE4(sc, port, PCIE_T6020_PORT_MSI_DOORBELL_LO,

sys/arch/arm64/dev/aplpcie.c

596

PWRITE4(sc, port, PCIE_T6020_PORT_MSI_DOORBELL_HI,

sys/arch/arm64/dev/aplpcie.c

603

PWRITE4(sc, port, PCIE_T6020_PORT_RID2SID(idx), 0);

sys/arch/arm64/dev/aplpcie.c

675

PWRITE4(sc, port, PCIE_PORT_LTSSM_CTRL, PCIE_PORT_LTSSM_CTRL_START);

sys/arch/arm64/dev/aplpcie.c

811

PWRITE4(sc, port, PCIE_PORT_RID2SID(idx), reg);

sys/arch/arm64/dev/aplpcie.c

843

PWRITE4(sc, port, PCIE_T6020_PORT_RID2SID(idx), reg);