sys/dev/fdt/qcpwm.c

160

ps->ps_enabled = !!(qcpwm_read(sc, PWM_CHAN_OFF(chan) +

sys/dev/fdt/qcpwm.c

163

reg = qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_SIZE_CLK);

sys/dev/fdt/qcpwm.c

164

switch (qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_SUBTYPE)) {

sys/dev/fdt/qcpwm.c

186

reg = qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_PREDIV_CLK);

sys/dev/fdt/qcpwm.c

194

sc->sc_addr + PWM_CHAN_OFF(chan) + PWM_VALUE,

sys/dev/fdt/qcpwm.c

226

reg = qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_SIZE_CLK);

sys/dev/fdt/qcpwm.c

227

switch (qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_SUBTYPE)) {

sys/dev/fdt/qcpwm.c

276

reg = qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_TYPE_CONFIG);

sys/dev/fdt/qcpwm.c

278

qcpwm_write(sc, PWM_CHAN_OFF(chan) + PWM_TYPE_CONFIG, reg);

sys/dev/fdt/qcpwm.c

281

switch (qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_SUBTYPE)) {

sys/dev/fdt/qcpwm.c

296

qcpwm_write(sc, PWM_CHAN_OFF(chan) + PWM_SIZE_CLK, reg);

sys/dev/fdt/qcpwm.c

297

qcpwm_write(sc, PWM_CHAN_OFF(chan) + PWM_PREDIV_CLK,

sys/dev/fdt/qcpwm.c

303

sc->sc_addr + PWM_CHAN_OFF(chan) + PWM_VALUE,

sys/dev/fdt/qcpwm.c

311

qcpwm_write(sc, PWM_CHAN_OFF(chan) + PWM_ENABLE_CONTROL, reg);

sys/dev/fdt/qcpwm.c

316

sc->sc_addr + PWM_CHAN_OFF(chan) + PWM_VALUE,

sys/dev/fdt/qcpwm.c

320

qcpwm_write(sc, PWM_CHAN_OFF(chan) + PWM_SYNC, PWM_SYNC_PWM);

sys/dev/fdt/qcpwm.c

322

reg = qcpwm_read(sc, PWM_CHAN_OFF(chan) + PWM_TYPE_CONFIG);

sys/dev/fdt/qcpwm.c

324

qcpwm_write(sc, PWM_CHAN_OFF(chan) + PWM_TYPE_CONFIG, reg);