Symbol: PTE_BUFFER_MODE
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
526
v->PTE_BUFFER_MODE,
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
1972
bool PTE_BUFFER_MODE[],
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
2181
PTE_BUFFER_MODE[k] = myPipe[k].FORCE_ONE_ROW_FOR_FRAME || UsesMALLForStaticScreen[k] ||
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
2256
dml_print("DML::%s: k=%d, PTE_BUFFER_MODE = %d\n", __func__, k, PTE_BUFFER_MODE[k]);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
431
bool PTE_BUFFER_MODE[],
sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.c
203
dml_get_pipe_attr_func(pte_buffer_mode, mode_lib->vba.PTE_BUFFER_MODE);
sys/dev/pci/drm/amd/display/dc/dml/display_mode_vba.h
1201
bool PTE_BUFFER_MODE[DC__NUM_DPP__MAX];
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
10331
dml_get_per_surface_var_func(pte_buffer_mode, dml_uint_t, mode_lib->mp.PTE_BUFFER_MODE);
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
5260
p->PTE_BUFFER_MODE[k] = p->PTEBufferModeOverrideVal[k];
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
5262
p->PTE_BUFFER_MODE[k] = p->myPipe[k].FORCE_ONE_ROW_FOR_FRAME || p->UsesMALLForStaticScreen[k] || (p->UseMALLForPStateChange[k] == dml_use_mall_pstate_change_sub_viewport) ||
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
5335
dml_print("DML::%s: k=%u, PTE_BUFFER_MODE = %u\n", __func__, k, p->PTE_BUFFER_MODE[k]);
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
7747
CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s->dummy_boolean_array[1];
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
8759
CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = locals->PTE_BUFFER_MODE;
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core_structs.h
1237
dml_bool_t PTE_BUFFER_MODE[__DML_NUM_PLANES__];
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core_structs.h
1455
dml_bool_t *PTE_BUFFER_MODE;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/inc/dml_top_types.h
668
bool PTE_BUFFER_MODE[DML2_MAX_PLANES];
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
10758
CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = mode_lib->mp.PTE_BUFFER_MODE;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
13275
out->informative.misc.PTE_BUFFER_MODE[k] = mode_lib->mp.PTE_BUFFER_MODE[k];
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3085
p->PTE_BUFFER_MODE[k] = p->display_cfg->plane_descriptors[k].overrides.hw.force_pte_buffer_mode.value;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3087
p->PTE_BUFFER_MODE[k] = p->myPipe[k].FORCE_ONE_ROW_FOR_FRAME || p->is_using_mall_for_ss[k] || (p->display_cfg->plane_descriptors[k].overrides.legacy_svp_config == dml2_svp_mode_override_main_pipe) ||
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3091
p->PTE_BUFFER_MODE[k] = 0;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3174
DML_LOG_VERBOSE("DML::%s: k=%u, PTE_BUFFER_MODE = %u\n", __func__, k, p->PTE_BUFFER_MODE[k]);
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
8971
CalculateVMRowAndSwath_params->PTE_BUFFER_MODE = s->dummy_boolean_array[1];
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
1353
bool *PTE_BUFFER_MODE;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
488
bool PTE_BUFFER_MODE[DML2_MAX_PLANES];
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
941
bool PTE_BUFFER_MODE[DML2_MAX_PLANES];
sys/dev/pci/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.h
247
type PTE_BUFFER_MODE; \
sys/dev/pci/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.h
39
HUBP_SF(HUBP0_DCHUBP_VMPG_CONFIG, PTE_BUFFER_MODE, mask_sh),\
sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h
222
HUBP_SF(HUBP0_DCHUBP_VMPG_CONFIG, PTE_BUFFER_MODE, mask_sh),\