sys/arch/armv7/marvell/mvpcie.c

671

case PPB_REG_PREFLIM_HI32:

sys/arch/armv7/marvell/mvpcie.c

723

case PPB_REG_PREFLIM_HI32:

sys/dev/acpi/acpidmar.c

2345

hi = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32);

sys/dev/fdt/cdpcie.c

204

limit |= (bus_addr_t)HREAD4(sc, PPB_REG_PREFLIM_HI32) << 32;

sys/dev/fdt/cdpcie.c

392

HWRITE4(sc, PPB_REG_PREFLIM_HI32, pmemlimit >> 32);

sys/dev/fdt/dwpcie.c

707

HWRITE4(sc, PPB_REG_PREFLIM_HI32, pmemlimit >> 32);

sys/dev/fdt/dwpcie.c

711

HWRITE4(sc, PPB_REG_PREFLIM_HI32, 0);

sys/dev/fdt/mvkpcie.c

640

case PPB_REG_PREFLIM_HI32:

sys/dev/pci/pci.c

1062

blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32);

sys/dev/pci/ppb.c

317

blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32);

sys/dev/pci/ppb.c

485

pci_conf_write(pc, tag, PPB_REG_PREFLIM_HI32,

sys/dev/pci/ppb.c

666

pci_conf_write(pc, sc->sc_tag, PPB_REG_PREFLIM_HI32, 0);