sys/arch/armv7/marvell/mvpcie.c

670

case PPB_REG_PREFBASE_HI32:

sys/arch/armv7/marvell/mvpcie.c

722

case PPB_REG_PREFBASE_HI32:

sys/dev/acpi/acpidmar.c

2343

hi = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32);

sys/dev/fdt/cdpcie.c

203

base |= (bus_addr_t)HREAD4(sc, PPB_REG_PREFBASE_HI32) << 32;

sys/dev/fdt/cdpcie.c

391

HWRITE4(sc, PPB_REG_PREFBASE_HI32, pmembase >> 32);

sys/dev/fdt/dwpcie.c

706

HWRITE4(sc, PPB_REG_PREFBASE_HI32, pmembase >> 32);

sys/dev/fdt/dwpcie.c

710

HWRITE4(sc, PPB_REG_PREFBASE_HI32, 0);

sys/dev/fdt/mvkpcie.c

639

case PPB_REG_PREFBASE_HI32:

sys/dev/pci/pci.c

1060

blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32);

sys/dev/pci/ppb.c

315

blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32);

sys/dev/pci/ppb.c

483

pci_conf_write(pc, tag, PPB_REG_PREFBASE_HI32,

sys/dev/pci/ppb.c

665

pci_conf_write(pc, sc->sc_tag, PPB_REG_PREFBASE_HI32, 0);