PRCM_REG_CORE_CLK1_BASE
#define PRCM_CLK_EN_MMC3 (PRCM_REG_CORE_CLK1_BASE + 30)
#define PRCM_CLK_EN_ICR (PRCM_REG_CORE_CLK1_BASE + 29)
#define PRCM_CLK_EN_AES2 (PRCM_REG_CORE_CLK1_BASE + 28)
#define PRCM_CLK_EN_SHA12 (PRCM_REG_CORE_CLK1_BASE + 27)
#define PRCM_CLK_EN_DES2 (PRCM_REG_CORE_CLK1_BASE + 26)
#define PRCM_CLK_EN_MMC2 (PRCM_REG_CORE_CLK1_BASE + 25)
#define PRCM_CLK_EN_MMC1 (PRCM_REG_CORE_CLK1_BASE + 24)
#define PRCM_CLK_EN_MSPRO (PRCM_REG_CORE_CLK1_BASE + 23)
#define PRCM_CLK_EN_HDQ (PRCM_REG_CORE_CLK1_BASE + 22)
#define PRCM_CLK_EN_MCSPI4 (PRCM_REG_CORE_CLK1_BASE + 21)
#define PRCM_CLK_EN_MCSPI3 (PRCM_REG_CORE_CLK1_BASE + 20)
#define PRCM_CLK_EN_MCSPI2 (PRCM_REG_CORE_CLK1_BASE + 19)
#define PRCM_CLK_EN_MCSPI1 (PRCM_REG_CORE_CLK1_BASE + 18)
#define PRCM_CLK_EN_I2C3 (PRCM_REG_CORE_CLK1_BASE + 17)
#define PRCM_CLK_EN_I2C2 (PRCM_REG_CORE_CLK1_BASE + 16)
#define PRCM_CLK_EN_I2C1 (PRCM_REG_CORE_CLK1_BASE + 15)
#define PRCM_CLK_EN_UART2 (PRCM_REG_CORE_CLK1_BASE + 14)
#define PRCM_CLK_EN_UART1 (PRCM_REG_CORE_CLK1_BASE + 13)
#define PRCM_CLK_EN_GPT11 (PRCM_REG_CORE_CLK1_BASE + 12)
#define PRCM_CLK_EN_GPT10 (PRCM_REG_CORE_CLK1_BASE + 11)
#define PRCM_CLK_EN_MCBSP5 (PRCM_REG_CORE_CLK1_BASE + 10)
#define PRCM_CLK_EN_MCBSP1 (PRCM_REG_CORE_CLK1_BASE + 9)
#define PRCM_CLK_EN_MAILBOXES (PRCM_REG_CORE_CLK1_BASE + 7)
#define PRCM_CLK_EN_OMAPCTRL (PRCM_REG_CORE_CLK1_BASE + 6)
#define PRCM_CLK_EN_HSOTGUSB (PRCM_REG_CORE_CLK1_BASE + 4)
#define PRCM_CLK_EN_SDRC (PRCM_REG_CORE_CLK1_BASE + 1)