sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

563

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

579

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

596

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

619

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

642

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

655

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

690

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

707

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

725

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

741

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

752

return PP_SMU_RESULT_OK;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

774

if (status == PP_SMU_RESULT_OK &&

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2359

uclk_states_available = (status == PP_SMU_RESULT_OK);

sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2369

clock_limits_available = (status == PP_SMU_RESULT_OK);