sys/dev/pci/drm/amd/pm/powerplay/inc/pp_endian.h

33

#define CONVERT_FROM_HOST_TO_SMC_UL(X) ((X) = PP_HOST_TO_SMC_UL(X))

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1011

table->LinkLevel[i].DownT = PP_HOST_TO_SMC_UL(5);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1012

table->LinkLevel[i].UpT = PP_HOST_TO_SMC_UL(30);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1278

memory_level->MinVddc = PP_HOST_TO_SMC_UL(memory_level->MinVddc * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1280

memory_level->MinVddci = PP_HOST_TO_SMC_UL(memory_level->MinVddci * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1281

memory_level->MinMvdd = PP_HOST_TO_SMC_UL(memory_level->MinMvdd * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1395

table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1397

table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1453

table->MemoryACPILevel.MinVddci = PP_HOST_TO_SMC_UL(data->acpi_vddci * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1455

table->MemoryACPILevel.MinVddci = PP_HOST_TO_SMC_UL(data->min_vddci_in_pptable * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1460

PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1483

PP_HOST_TO_SMC_UL(dll_cntl);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1485

PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1487

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1489

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1491

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1493

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1495

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1497

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1499

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1643

arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dramTiming);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1644

arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dramTiming2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1756

data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2795

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2797

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2809

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2812

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2830

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2832

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2844

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2847

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

457

level->MinVddc = PP_HOST_TO_SMC_UL(level->MinVddc * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

746

dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1401

PP_HOST_TO_SMC_UL(us_mvdd * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1515

arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dram_timing);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1516

arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dram_timing2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2091

table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2582

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2584

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2596

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2599

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2617

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2619

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2631

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2634

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

843

table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

844

table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1324

memory_level->MinVddc = PP_HOST_TO_SMC_UL(memory_level->MinVddc * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1326

memory_level->MinVddci = PP_HOST_TO_SMC_UL(memory_level->MinVddci * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1327

memory_level->MinMvdd = PP_HOST_TO_SMC_UL(memory_level->MinMvdd * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1441

table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1443

table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1499

table->MemoryACPILevel.MinVddci = PP_HOST_TO_SMC_UL(data->acpi_vddci * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1501

table->MemoryACPILevel.MinVddci = PP_HOST_TO_SMC_UL(data->min_vddci_in_pptable * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1506

PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1529

PP_HOST_TO_SMC_UL(dll_cntl);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1531

PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1533

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1535

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1537

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1539

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1541

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1543

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1545

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1604

arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dramTiming);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1605

arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dramTiming2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1722

data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1889

dpm_table->BAPM_TEMP_GRADIENT = PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

782

PP_HOST_TO_SMC_UL(5);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

784

PP_HOST_TO_SMC_UL(30);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

944

graphic_level->MinVddc = PP_HOST_TO_SMC_UL(graphic_level->MinVddc * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1344

table->MemoryACPILevel.MinMvdd = PP_HOST_TO_SMC_UL(vol_level.Voltage);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1483

arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dram_timing);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1484

arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dram_timing2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1838

table->BTCGB_VDROOP_TABLE[0].a0 = PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1839

table->BTCGB_VDROOP_TABLE[0].a1 = PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1840

table->BTCGB_VDROOP_TABLE[0].a2 = PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1841

table->BTCGB_VDROOP_TABLE[1].a0 = PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSOFF_a0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1842

table->BTCGB_VDROOP_TABLE[1].a1 = PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSOFF_a1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1843

table->BTCGB_VDROOP_TABLE[1].a2 = PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSOFF_a2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1844

table->AVFSGB_VDROOP_TABLE[0].m1 = PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSON_m1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1846

table->AVFSGB_VDROOP_TABLE[0].b = PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSON_b);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1849

table->AVFSGB_VDROOP_TABLE[1].m1 = PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSOFF_m1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1851

table->AVFSGB_VDROOP_TABLE[1].b = PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSOFF_b);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1855

AVFS_meanNsigma.Aconstant[0] = PP_HOST_TO_SMC_UL(avfs_params.ulAVFS_meanNsigma_Acontant0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1856

AVFS_meanNsigma.Aconstant[1] = PP_HOST_TO_SMC_UL(avfs_params.ulAVFS_meanNsigma_Acontant1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1857

AVFS_meanNsigma.Aconstant[2] = PP_HOST_TO_SMC_UL(avfs_params.ulAVFS_meanNsigma_Acontant2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2104

table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2620

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2622

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2634

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2637

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2655

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2657

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2669

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2672

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

685

table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

832

table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

833

table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1248

PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1271

PP_HOST_TO_SMC_UL(dll_cntl);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1273

PP_HOST_TO_SMC_UL(mclk_pwrmgt_cntl);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1275

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_AD_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1277

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1279

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1281

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1283

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_FUNC_CNTL_2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1285

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1287

PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1479

arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dramTiming);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1480

arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dramTiming2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1853

PP_HOST_TO_SMC_UL(defaults->bapm_temp_gradient);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2100

data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2423

table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3181

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3183

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3195

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3198

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3216

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3218

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3230

tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3233

cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

525

PP_HOST_TO_SMC_UL(5);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

527

PP_HOST_TO_SMC_UL(30);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1174

table->MemoryACPILevel.MinMvdd = PP_HOST_TO_SMC_UL(vol_level.Voltage);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1268

arb_regs->McArbDramTiming = PP_HOST_TO_SMC_UL(dram_timing);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1269

arb_regs->McArbDramTiming2 = PP_HOST_TO_SMC_UL(dram_timing2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1270

arb_regs->McArbBurstTime = PP_HOST_TO_SMC_UL(burst_time);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1271

arb_regs->McArbRfshRate = PP_HOST_TO_SMC_UL(rfsh_rate);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1272

arb_regs->McArbMisc3 = PP_HOST_TO_SMC_UL(misc3);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1585

PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1587

PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1589

PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSON_a2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1591

PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSOFF_a0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1593

PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSOFF_a1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1595

PP_HOST_TO_SMC_UL(avfs_params.ulGB_VDROOP_TABLE_CKSOFF_a2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1597

PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSON_m1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1601

PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSON_b);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1605

PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSOFF_m1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1609

PP_HOST_TO_SMC_UL(avfs_params.ulAVFSGB_FUSE_TABLE_CKSOFF_b);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1614

PP_HOST_TO_SMC_UL(avfs_params.ulAVFS_meanNsigma_Acontant0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1616

PP_HOST_TO_SMC_UL(avfs_params.ulAVFS_meanNsigma_Acontant1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1618

PP_HOST_TO_SMC_UL(avfs_params.ulAVFS_meanNsigma_Acontant2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

2119

table->Smio[i] = PP_HOST_TO_SMC_UL(table->Smio[i]);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

469

table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

586

table->LinkLevel[i].DownThreshold = PP_HOST_TO_SMC_UL(5);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

587

table->LinkLevel[i].UpThreshold = PP_HOST_TO_SMC_UL(30);