sys/dev/pci/drm/i915/display/g4x_dp.c

1389

if (port == PORT_D)

sys/dev/pci/drm/i915/display/g4x_hdmi.c

660

return port == PORT_B || port == PORT_C || port == PORT_D;

sys/dev/pci/drm/i915/display/g4x_hdmi.c

745

if (port == PORT_D)

sys/dev/pci/drm/i915/display/intel_bios.c

2349

[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },

sys/dev/pci/drm/i915/display/intel_combo_phy.c

166

bool ddi_d_present = intel_bios_is_port_present(display, PORT_D);

sys/dev/pci/drm/i915/display/intel_ddi.c

3393

[PORT_D] = TRANSCODER_C,

sys/dev/pci/drm/i915/display/intel_ddi.c

4960

if (port == PORT_D)

sys/dev/pci/drm/i915/display/intel_ddi.c

5037

case PORT_D:

sys/dev/pci/drm/i915/display/intel_ddi.c

5078

port_name(port - PORT_D_XELPD + PORT_D),

sys/dev/pci/drm/i915/display/intel_display.c

1882

port == PORT_D)

sys/dev/pci/drm/i915/display/intel_display.c

7787

dpd_is_edp = intel_dp_is_port_edp(display, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.c

7805

g4x_hdmi_init(display, PCH_HDMID, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.c

7811

g4x_dp_init(display, PCH_DP_D, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.c

7852

has_port = intel_bios_is_port_present(display, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.c

7854

g4x_dp_init(display, CHV_DP_D, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.c

7856

g4x_hdmi_init(display, CHV_HDMID, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.c

7903

g4x_dp_init(display, DP_D, PORT_D);

sys/dev/pci/drm/i915/display/intel_display.h

107

case PORT_D:

sys/dev/pci/drm/i915/display/intel_display_device.c

1783

display_runtime->port_mask &= ~BIT(PORT_D);

sys/dev/pci/drm/i915/display/intel_display_device.c

427

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */

sys/dev/pci/drm/i915/display/intel_display_device.c

439

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */

sys/dev/pci/drm/i915/display/intel_display_device.c

454

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

483

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

508

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

586

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

639

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

658

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

683

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

932

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

940

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),

sys/dev/pci/drm/i915/display/intel_display_limits.h

106

PORT_TC1 = PORT_D,

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

1190

case PORT_D:

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

666

case PORT_D:

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

682

case PORT_D:

sys/dev/pci/drm/i915/display/intel_dpll_mgr.c

3371

if (port == PORT_D || port == PORT_E) {

sys/dev/pci/drm/i915/display/intel_hdcp.c

470

case PORT_D:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2736

case PORT_D:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2779

case PORT_D:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2901

case PORT_D:

sys/dev/pci/drm/i915/display/intel_pch_display.c

102

assert_pch_hdmi_disabled(display, pipe, PORT_D, PCH_HDMID);

sys/dev/pci/drm/i915/display/intel_pch_display.c

171

ibx_sanitize_pch_dp_port(display, PORT_D, PCH_DP_D);

sys/dev/pci/drm/i915/display/intel_pch_display.c

176

ibx_sanitize_pch_hdmi_port(display, PORT_D, PCH_HDMID);

sys/dev/pci/drm/i915/display/intel_pch_display.c

438

drm_WARN_ON(display->drm, port < PORT_B || port > PORT_D);

sys/dev/pci/drm/i915/display/intel_pch_display.c

87

assert_pch_dp_disabled(display, pipe, PORT_D, PCH_DP_D);

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

112

case PORT_D:

sys/dev/pci/drm/i915/display/intel_pps.c

1654

case PORT_D:

sys/dev/pci/drm/i915/display/intel_pps.c

1868

g4x_dp_port_enabled(display, PCH_DP_D, PORT_D, &panel_pipe);

sys/dev/pci/drm/i915/gvt/display.c

468

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_D)) {

sys/dev/pci/drm/i915/gvt/display.c

470

~DPLL_CTRL2_DDI_CLK_OFF(PORT_D);

sys/dev/pci/drm/i915/gvt/display.c

472

DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_D);

sys/dev/pci/drm/i915/gvt/display.c

474

DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_D);

sys/dev/pci/drm/i915/gvt/display.c

481

(PORT_D << TRANS_DDI_PORT_SHIFT) |

sys/dev/pci/drm/i915/gvt/display.c

484

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &=

sys/dev/pci/drm/i915/gvt/display.c

486

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |=

sys/dev/pci/drm/i915/gvt/display.c

489

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

490

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE;

sys/dev/pci/drm/i915/gvt/display.c

783

clean_virtual_dp_monitor(vgpu, PORT_D);

sys/dev/pci/drm/i915/gvt/display.c

811

return setup_virtual_dp_monitor(vgpu, PORT_D, GVT_DP_D,

sys/dev/pci/drm/i915/gvt/edid.c

112

port = PORT_D;

sys/dev/pci/drm/i915/gvt/edid.c

128

port = PORT_D;

sys/dev/pci/drm/i915/gvt/edid.c

96

port = PORT_D;

sys/dev/pci/drm/i915/gvt/handlers.c

2373

MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2379

MMIO_DH(DP_TP_CTL(PORT_D), D_ALL, NULL, dp_tp_ctl_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2385

MMIO_DH(DP_TP_STATUS(PORT_D), D_ALL, NULL, dp_tp_status_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

671

if (port != PORT_B && port != PORT_D) {

sys/dev/pci/drm/i915/gvt/vgpu.c

378

ret = intel_gvt_set_edid(vgpu, PORT_D);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

501

MMIO_D(PORT_CLK_SEL(PORT_D));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

532

MMIO_D(DDI_BUF_CTL(PORT_D));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

537

MMIO_D(DP_TP_CTL(PORT_D));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

542

MMIO_D(DP_TP_STATUS(PORT_D));