PPCLK_e
static void dcn32_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0,
static bool dcn401_is_ppclk_idle_dpm_enabled(struct clk_mgr_internal *clk_mgr, PPCLK_e clk)
static void dcn401_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0,
static int dcn401_set_hard_min_by_freq_optimized(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, int requested_clk_khz)
static bool dcn401_is_ppclk_dpm_enabled(struct clk_mgr_internal *clk_mgr, PPCLK_e clk)
PPCLK_e clk_select = 0;
PPCLK_e clock_select,
PPCLK_e clk_id, uint32_t *num_of_levels)
PPCLK_e clkID, uint32_t index, uint32_t *clock)
PPCLK_e clock_select,
struct vega12_single_dpm_table *dpm_table, PPCLK_e clk_id)
PPCLK_e clkid, struct vega12_clock_range *clock)
PP_Clock *clock, PPCLK_e clock_select)
PPCLK_e clock_select,
PPCLK_e clk_id, uint32_t *clk_freq)
PPCLK_e clk_select = 0;
PPCLK_e clk_id, uint32_t *num_of_levels)
PPCLK_e clk_id, uint32_t index, uint32_t *clk)
struct vega20_single_dpm_table *dpm_table, PPCLK_e clk_id)