sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

155

dcn3_init_single_clock(clk_mgr, PPCLK_PIXCLK,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

291

dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PIXCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_khz));

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1592

clk_select = PPCLK_PIXCLK;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

747

ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_PIXCLK);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

1659

PPCLK_PIXCLK)) == 0,

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2317

clk_select = PPCLK_PIXCLK;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

734

ret = vega20_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_PIXCLK);

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1090

!driver_ppt->DpmDescriptor[PPCLK_PIXCLK].SnapToDiscrete;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

160

CLK_MAP(PIXCLK, PPCLK_PIXCLK),

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

1107

!table_member[PPCLK_PIXCLK].SnapToDiscrete;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

177

CLK_MAP(PIXCLK, PPCLK_PIXCLK),