sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

160

dcn3_init_single_clock(clk_mgr, PPCLK_PHYCLK,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

485

dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PHYCLK, khz_to_mhz_ceil(clk_mgr_base->clks.phyclk_khz));

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

1595

clk_select = PPCLK_PHYCLK;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

769

ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_PHYCLK);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

1654

PPCLK_PHYCLK)) == 0,

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

2320

clk_select = PPCLK_PHYCLK;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

756

ret = vega20_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_PHYCLK);

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

1126

!driver_ppt->DpmDescriptor[PPCLK_PHYCLK].SnapToDiscrete;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

161

CLK_MAP(PHYCLK, PPCLK_PHYCLK),

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

1143

!table_member[PPCLK_PHYCLK].SnapToDiscrete;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

178

CLK_MAP(PHYCLK, PPCLK_PHYCLK),