sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

191

dcn32_init_single_clock(clk_mgr, PPCLK_DCFCLK,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

194

clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_DCFCLK);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

683

dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz));

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

241

if (clk == PPCLK_DCFCLK)

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

103

case PPCLK_DCFCLK:

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

244

dcn401_init_single_clock(clk_mgr, PPCLK_DCFCLK,

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

247

clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = dcn401_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_DCFCLK);

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

847

if (dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_DCFCLK)) {

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

848

block_sequence[num_steps].params.update_hardmin_params.ppclk = PPCLK_DCFCLK;

sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

859

if (dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_DCFCLK)) {

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

1046

case PPCLK_DCFCLK:

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

188

CLK_MAP(DCEFCLK, PPCLK_DCFCLK),

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

781

*value = metrics->CurrClock[PPCLK_DCFCLK];

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c

1035

case PPCLK_DCFCLK:

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c

159

CLK_MAP(DCEFCLK, PPCLK_DCFCLK),

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c

773

*value = metrics->CurrClock[PPCLK_DCFCLK];

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

150

CLK_MAP(DCEFCLK, PPCLK_DCFCLK),

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

699

*value = metrics->CurrClock[PPCLK_DCFCLK];

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

957

case PPCLK_DCFCLK: