PLANE_CURSOR
if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))
!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)));
if (plane->id == PLANE_CURSOR) {
g4x_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
wm_state->sr.cursor = raw->plane[PLANE_CURSOR];
wm_state->hpll.cursor = raw->plane[PLANE_CURSOR];
g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) &&
g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_HPLL)) &&
if (plane->id == PLANE_CURSOR) {
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
fifo_state->plane[PLANE_CURSOR] = 63;
int max_wm = plane_id == PLANE_CURSOR ? 63 : 511;
vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
vlv_invert_wm_value(raw->plane[PLANE_CURSOR],
if (dirty & ~BIT(PLANE_CURSOR)) {
drm_WARN_ON(display->drm, fifo_state->plane[PLANE_CURSOR] != 63);
wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2;
fifo_state->plane[PLANE_CURSOR] = 63;
wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);
wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);
wm->ddl[pipe].plane[PLANE_CURSOR] =
wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);
wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);
wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);
raw->plane[PLANE_CURSOR] = active->sr.cursor;
raw->plane[PLANE_CURSOR] = active->hpll.cursor;
wm->pipe[pipe].plane[PLANE_CURSOR],
wm->pipe[pipe].plane[PLANE_CURSOR],
FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
(wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |
FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));
case PLANE_CURSOR:
if (plane_id == PLANE_CURSOR)
return hweight8(crtc_state->active_planes & ~BIT(PLANE_CURSOR));
if (plane_id == PLANE_CURSOR)
cursor->id = PLANE_CURSOR;
~(icl_hdr_plane_mask() | BIT(PLANE_CURSOR))) == 0;
if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
crtc_state->active_planes & BIT(PLANE_CURSOR) &&
entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN8_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = CURSORA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = CURSORB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = CURSORC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = ERR_INT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = ERR_INT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = ERR_INT_CURSOR_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GTT_FAULT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GTT_FAULT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
if (plane_id == PLANE_CURSOR)
if (plane->id == PLANE_CURSOR)
old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR);
new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR);
return plane->id == PLANE_CURSOR &&
if (plane->id == PLANE_CURSOR)
if (plane->id == PLANE_CURSOR)
if (plane->id == PLANE_CURSOR)
if (DISPLAY_VER(display) >= 9 && plane->id != PLANE_CURSOR) {
if (plane->id != PLANE_CURSOR)
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
if (plane->id == PLANE_CURSOR)
if (plane_id == PLANE_CURSOR)
skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb[PLANE_CURSOR],
if (plane_id == PLANE_CURSOR) {
if (plane_id == PLANE_CURSOR)
return DISPLAY_VER(display) >= 30 && level == 0 && plane->id != PLANE_CURSOR;
if (plane_id != PLANE_CURSOR)
if (plane_id != PLANE_CURSOR)
if (plane_id != PLANE_CURSOR)
if (plane_id != PLANE_CURSOR)
if (plane_id == PLANE_CURSOR) {