sys/dev/pci/drm/i915/display/intel_ddi.c

2022

intel_de_write(display, PORT_CLK_SEL(port), hsw_pll_to_ddi_pll_sel(pll));

sys/dev/pci/drm/i915/display/intel_ddi.c

2030

intel_de_write(display, PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);

sys/dev/pci/drm/i915/display/intel_ddi.c

2038

return intel_de_read(display, PORT_CLK_SEL(port)) != PORT_CLK_SEL_NONE;

sys/dev/pci/drm/i915/display/intel_ddi.c

2048

tmp = intel_de_read(display, PORT_CLK_SEL(port));

sys/dev/pci/drm/i915/display/intel_display_regs.h

2437

#define DDI_CLK_SEL(port) PORT_CLK_SEL(port)

sys/dev/pci/drm/i915/gvt/display.c

432

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) &=

sys/dev/pci/drm/i915/gvt/display.c

434

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) |=

sys/dev/pci/drm/i915/gvt/display.c

458

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) &=

sys/dev/pci/drm/i915/gvt/display.c

460

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) |=

sys/dev/pci/drm/i915/gvt/display.c

484

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &=

sys/dev/pci/drm/i915/gvt/display.c

486

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |=

sys/dev/pci/drm/i915/gvt/handlers.c

477

u32 ddi_pll_sel = vgpu_vreg_t(vgpu, PORT_CLK_SEL(port));

sys/dev/pci/drm/i915/gvt/handlers.c

541

vgpu->id, port_name(port), vgpu_vreg_t(vgpu, PORT_CLK_SEL(port)));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

498

MMIO_D(PORT_CLK_SEL(PORT_A));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

499

MMIO_D(PORT_CLK_SEL(PORT_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

500

MMIO_D(PORT_CLK_SEL(PORT_C));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

501

MMIO_D(PORT_CLK_SEL(PORT_D));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

502

MMIO_D(PORT_CLK_SEL(PORT_E));