sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

231

dccg314_set_pixel_rate_div(dccg, params->otg_inst, PIXEL_RATE_DIV_BY_1, PIXEL_RATE_DIV_BY_1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

230

dccg32_set_pixel_rate_div(dccg, params->otg_inst, PIXEL_RATE_DIV_BY_1, PIXEL_RATE_DIV_BY_1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1402

dccg35_set_pixel_rate_div(dccg, params->otg_inst, PIXEL_RATE_DIV_BY_1, PIXEL_RATE_DIV_BY_1);

sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2325

dccg35_set_pixel_rate_div(dccg, params->otg_inst, PIXEL_RATE_DIV_BY_1, PIXEL_RATE_DIV_BY_1);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

337

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

338

*k2_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

340

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

347

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

350

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1194

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1195

*k2_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1197

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1204

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1207

*k1_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

714

*tmds_div = PIXEL_RATE_DIV_BY_1;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

936

*tmds_div = PIXEL_RATE_DIV_BY_1;