sys/dev/pci/drm/i915/display/intel_pipe_crc.c

140

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_VLV;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

143

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_B_VLV;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

147

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_C_VLV;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

153

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DP_D_VLV;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

205

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_I9XX;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

210

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_TV_PRE;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

263

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PRIMARY_ILK;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

266

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_ILK;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

269

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PIPE_ILK;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

346

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PRIMARY_IVB;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

349

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_SPRITE_IVB;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

352

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PF_IVB;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

374

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_1_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

377

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_2_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

380

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_3_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

383

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_4_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

386

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_5_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

389

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_6_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

392

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_PLANE_7_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

395

*val = PIPE_CRC_ENABLE | PIPE_CRC_SOURCE_DMUX_SKL;

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

66

*val = PIPE_CRC_ENABLE | PIPE_CRC_INCLUDE_BORDER_I8XX;