PG_RW
e & PG_RW ? 'W' : '-',
inherited & PG_RW ? 'W' : '-',
PG_RW | PG_V | PG_M | PG_PS | PG_U;
npde = (HIBERNATE_PD_LOW2) | PG_RW | PG_V;
PG_RW | PG_V | PG_M | PG_PS | PG_U;
npde = (HIBERNATE_PDPT_HI) | PG_RW | PG_V;
npde = (HIBERNATE_PD_HI) | PG_RW | PG_V;
npde = (pa & PG_LGFRAME) | PG_RW | PG_V | PG_PS;
npde = (pa & PMAP_PA_MASK) | PG_RW | PG_V | PG_M | PG_U;
npde = (HIBERNATE_PDPT_LOW) | PG_RW | PG_V;
npde = (HIBERNATE_PD_LOW) | PG_RW | PG_V;
npde = (HIBERNATE_PT_LOW) | PG_RW | PG_V;
*pte = lapic_base | PG_RW | PG_V | PG_N | PG_G | pg_nx;
(newp & pg_frame) | PG_V | PG_RW | pg_crypt;
pva[index] = (pd_entry_t) (pa | PG_u | PG_RW | PG_V | pg_crypt);
clear = PG_RW;
pd[l4idx] = (npa | PG_RW | PG_V | pg_crypt);
pd[l3idx] = (npa | PG_RW | PG_V | pg_crypt);
pd[l2idx] = (npa | PG_RW | PG_V | pg_crypt);
npte |= (PG_u | PG_RW); /* XXXCDC: no longer needed? */
} else if ((opte | (npte ^ PG_RW)) & PG_RW) {
PTE_BASE[pl1_i(va)] = npte ^ PG_RW;
pdep[i] = pa | PG_RW | PG_V | pg_nx | pg_crypt;
npte = (pa & PMAP_PA_MASK) | ((prot & PROT_WRITE) ? PG_RW : PG_RO) |
pml4e[PDIR_SLOT_EARLY] = (pd_entry_t)early_pte_pages | PG_V | PG_RW |
pte[0] = (early_pte_pages + NBPG) | PG_V | PG_RW | pg_crypt;
pte[1] = (early_pte_pages + 2 * NBPG) | PG_V | PG_RW | pg_crypt;
pte[(i * 512) + j] = curpa | PG_V | PG_RW | PG_PS |
protection_codes[PROT_WRITE] = PG_RW | pg_nx; /* w-- */
protection_codes[PROT_WRITE | PROT_EXEC] = PG_RW; /* w-x */
protection_codes[PROT_WRITE | PROT_READ] = PG_RW | pg_nx; /* wr- */
protection_codes[PROT_READ | PROT_WRITE | PROT_EXEC] = PG_RW; /* wrx */
*((pd_entry_t *)va) |= PG_RW | PG_V | PG_PS | pg_g_kern | PG_U |
*((pd_entry_t *)va) |= PG_RW | PG_V | PG_U | PG_M | pg_nx |
PG_RW | PG_V | PG_U | PG_M | pg_nx |
pml2[j] |= PG_RW | PG_V | pg_g_kern |
if ((mode == PROT_WRITE) && !(pte & PG_RW))
(void) pmap_clear_attrs(pg, PG_RW);
if ((cr3[idx] & PG_RW) == 0)
cr3[idx] |= PG_RW;
if ((p[idx] & PG_RW) == 0)
p[idx] |= PG_RW;
if ((p[idx] & PG_RW) == 0)
p[idx] |= PG_RW;
if ((p[idx] & PG_RW) == 0)
p[idx] |= PG_RW;
pml4[kern_pml4] = (uint64_t)pml3 | PG_V | PG_RW;
pml3[kern_pml3] = (uint64_t)pml2 | PG_V | PG_RW;
pml2[i + kern_pml2] = (uint64_t)pml1 | PG_V | PG_RW;
(j - kern_pml1) * PAGE_SIZE) | PG_V | PG_RW;
pml4[0] = (uint64_t)pml3 | PG_V | PG_RW; /* Covers 0-512GB */
pml3[0] = (uint64_t)pml2 | PG_V | PG_RW; /* Covers 0-1GB */
pml2[i] = (i << L2_SHIFT) | PG_V | PG_RW | PG_PS;
pmap_pte_setbits(addr, PG_RW, 0);
pmap_pte_setbits(addr, bits, PG_RW);
npde = (pa & HIB_PD_MASK) | PG_RW | PG_V | PG_M | PG_PS;
npte = (pa & PMAP_PA_MASK) | PG_RW | PG_V | PG_M;
npde = (HIBERNATE_PT_PAGE & PMAP_PA_MASK) | PG_RW | PG_V | PG_M;
pmap_pte_set(va, lapic_base, PG_RW | PG_V | PG_N);
pmap_pte_setbits(va, 0, PG_RW);
npte = PTP0_PA | PG_RW | PG_V | PG_U | PG_M;
PG_RW | PG_V | PG_M | PG_U | pde_flags);
*zpte = (pa & PG_FRAME) | PG_V | PG_RW; /* map in */
*pte = (pa & PG_FRAME) | PG_V | PG_RW;
*spte = (srcpa & PG_FRAME) | PG_V | PG_RW;
*dpte = (dstpa & PG_FRAME) | PG_V | PG_RW;
md_prot |= PG_RW;
npte |= PG_RW; /* XXXCDC: no longer needed? */
pd[l2idx] = (npa | PG_RW | PG_V | PG_M | PG_U);
ptaddr | PG_RW | PG_V | PG_U | PG_M;
*APDP_PDE = (pd_entry_t) (pmap->pm_pdirpa | PG_RW | PG_V |
*ptpte = PG_V | PG_RW | pa; /* always a new mapping */
bits = pmap_pte_set(va, pa, ((prot & PROT_WRITE) ? PG_RW : PG_RO) |
protection_codes[PROT_WRITE] = PG_RW; /* w-- */
protection_codes[PROT_WRITE | PROT_EXEC] = PG_RW|PG_X; /* w-x */
protection_codes[PROT_READ | PROT_WRITE] = PG_RW; /* wr- */
protection_codes[PROT_READ | PROT_WRITE | PROT_EXEC] = PG_RW|PG_X; /* wrx */
*zpte = (pa & PG_FRAME) | PG_V | PG_RW; /* map in */
*spte = (srcpa & PG_FRAME) | PG_V | PG_RW;
*dpte = (dstpa & PG_FRAME) | PG_V | PG_RW;
md_prot |= PG_RW;
npte |= PG_RW; /* XXXCDC: no longer needed? */
pd[l2idx] = (npa | PG_RW | PG_V | PG_M | PG_U);
ptaddr | PG_RW | PG_V | PG_U | PG_M;
npte = PTP0_PA | PG_RW | PG_V | PG_U | PG_M;
*ptpte = PG_V | PG_RW | pa; /* always a new mapping */
*pte = (pa & PG_FRAME) | PG_V | PG_RW;
APDP_PDE[0] = pmap->pm_pdidx[0] | PG_RW | PG_V | PG_U | PG_M;
APDP_PDE[1] = pmap->pm_pdidx[1] | PG_RW | PG_V | PG_U | PG_M;
APDP_PDE[2] = pmap->pm_pdidx[2] | PG_RW | PG_V | PG_U | PG_M;
APDP_PDE[3] = pmap->pm_pdidx[3] | PG_RW | PG_V | PG_U | PG_M;
PG_RW | PG_V | PG_M | PG_U | pde_flags);
(void) pmap_clear_attrs(pg, PG_RW);
#define m88k_protection(prot) ((prot) & PROT_WRITE ? PG_RW : PG_RO)
*pte++ = pa | PG_SO | PG_RW | PG_M_U | PG_W | PG_V | CACHE_WT;
*pte++ = pa | PG_SO | PG_RW | PG_M_U | PG_W | PG_V;
*pte++ = pa | PG_SO | PG_RW | PG_M_U | PG_V;
template = PG_SO | PG_RW | PG_M_U | PG_W | PG_V | pte_cmode;
#define _PAGE_RW PG_RW
if ((mode == PROT_WRITE) && !(pte & PG_RW))