PCI_MAPREG_START
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
bir = PCI_MAPREG_START + bir * 4;
bir = PCI_MAPREG_START + (table & PCI_MSIX_TABLE_BIR) * 4;
bir = PCI_MAPREG_START + bir * 4;
#define RP1_MSIX_BAR (PCI_MAPREG_START + 0x00)
#define RP1_PERIPH_BAR (PCI_MAPREG_START + 0x04)
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_PPB_END; bar += 4) {
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
if (pci_mapreg_map(pa, PCI_MAPREG_START,
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
REGVAL(BONITO_PCI_REG(PCI_MAPREG_START + 0 * 4)),
REGVAL(BONITO_PCI_REG(PCI_MAPREG_START + 1 * 4)),
REGVAL(BONITO_PCI_REG(PCI_MAPREG_START + 2 * 4)),
REGVAL(BONITO_PCI_REG(PCI_MAPREG_START + 3 * 4)),
REGVAL(BONITO_PCI_REG(PCI_MAPREG_START + 4 * 4)),
REGVAL(BONITO_PCI_REG(PCI_MAPREG_START + 5 * 4)));
static pcireg_t pcib_bar_sizes[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
static pcireg_t pcib_bar_values[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4];
static uint64_t pcib_bar_msr[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
case PCI_MAPREG_START + 0x00:
case PCI_MAPREG_START + 0x04:
case PCI_MAPREG_START + 0x08:
case PCI_MAPREG_START + 0x0c:
case PCI_MAPREG_START + 0x10:
case PCI_MAPREG_START + 0x14:
case PCI_MAPREG_START + 0x18:
index = (reg - PCI_MAPREG_START) / 4;
case PCI_MAPREG_START + 0x00:
case PCI_MAPREG_START + 0x04:
case PCI_MAPREG_START + 0x08:
case PCI_MAPREG_START + 0x0c:
case PCI_MAPREG_START + 0x10:
case PCI_MAPREG_START + 0x14:
case PCI_MAPREG_START + 0x18:
index = (reg - PCI_MAPREG_START) / 4;
case PCI_MAPREG_START + 0x10:
case PCI_MAPREG_START + 0x10:
case PCI_MAPREG_START:
case PCI_MAPREG_START:
case PCI_MAPREG_START + 0x00:
case PCI_MAPREG_START + 0x00:
case PCI_MAPREG_START + 0x00:
case PCI_MAPREG_START + 0x00:
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
if (pci_mapreg_map(pa, PCI_MAPREG_START + 4, PCI_MAPREG_TYPE_MEM,
if (pci_mapreg_map(pa, PCI_MAPREG_START + 8, PCI_MAPREG_TYPE_IO,
bar = pci_conf_read_early(tag, PCI_MAPREG_START);
bar = pci_conf_read_early(tag, PCI_MAPREG_START + 4);
bar = pci_conf_read_early(tag, PCI_MAPREG_START + 8);
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
bar = pci_conf_read_early(tag, PCI_MAPREG_START);
bar = pci_conf_read_early(tag, PCI_MAPREG_START + 0x04);
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x04, PCI_MAPREG_TYPE_MEM,
pci_conf_write(pc, tag, PCI_MAPREG_START, 0x06228000);
for (bar = PCI_MAPREG_START; bar < PCI_MAPREG_END; bar += 4)
pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
pci_conf_write(pc, pa->pa_tag, PCI_MAPREG_START, 0xffffffff);
size = ~(pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START));
pci_conf_write(pc, pa->pa_tag, PCI_MAPREG_START,
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_PPB_END; bar += 4) {
bir = PCI_MAPREG_START + (table & PCI_MSIX_TABLE_BIR) * 4;
bir = PCI_MAPREG_START + bir * 4;
bir = PCI_MAPREG_START + (table & PCI_MSIX_TABLE_BIR) * 4;
bir = PCI_MAPREG_START + bir * 4;
bar = PCI_MAPREG_START + IFB_PCI_CFG_BAR_OFFSET(cf);
bir = PCI_MAPREG_START + bir * 4;
bir = PCI_MAPREG_START + bir * 4;
#define SBBC_PCI_BAR PCI_MAPREG_START
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_PPB_END; bar += 4) {
bar = PCI_MAPREG_START + 4 * i;
HWRITE4(sc, PCI_MAPREG_START, PCI_MAPREG_MEM_TYPE_64BIT);
HWRITE4(sc, PCI_MAPREG_START + 4, 0);
#define SF_PCI_MEMBA (PCI_MAPREG_START + 0x00)
#define SF_PCI_IOBA (PCI_MAPREG_START + 0x08)
#define AHD_PCI_IOADDR PCI_MAPREG_START /* I/O BAR*/
#define AHD_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Memory BAR */
#define AHD_PCI_IOADDR1 (PCI_MAPREG_START + 12)/* Second I/O BAR */
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->aac_memt,
#define AHC_PCI_IOADDR PCI_MAPREG_START /* I/O Address */
#define AHC_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Mem I/O Address */
#define AMI_BAR PCI_MAPREG_START
#define ARC_RA_PCI_BAR PCI_MAPREG_START
#define ARC_RB_DOORBELL_BAR PCI_MAPREG_START
#define ARC_RD_PCI_BAR PCI_MAPREG_START
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
retval = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM |
#define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START)
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_MEM_TYPE_64BIT, 0,
for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_MEM_TYPE_64BIT, 0,
val = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
error = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &psc->sc_st,
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x00,
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
err = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
for (rid = PCI_MAPREG_START; rid < PCI_MAPREG_END;) {
#define IAVF_PCIREG PCI_MAPREG_START
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
err = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
#define IGC_PCIREG PCI_MAPREG_START
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
err = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
#define IWN_PCI_BAR0 PCI_MAPREG_START
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
err = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
#define IXL_PCIREG PCI_MAPREG_START
memtype = pci_mapreg_type(sc->sc_pc, sc->sc_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_mmiot,
#define MCX_HCA_BAR PCI_MAPREG_START /* BAR 0 */
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
#define MYXBAR0 PCI_MAPREG_START
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
#define NGBE_PCIREG PCI_MAPREG_START /* BAR 0 */
#define PCN_PCI_CBIO (PCI_MAPREG_START + 0x00)
#define PCN_PCI_CBMEM (PCI_MAPREG_START + 0x04)
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
#define RGE_PCI_BAR0 PCI_MAPREG_START
#define RGE_PCI_BAR1 (PCI_MAPREG_START + 4)
#define RGE_PCI_BAR2 (PCI_MAPREG_START + 8)
rc = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
#define STGE_PCI_IOBA (PCI_MAPREG_START + 0x00)
#define STGE_PCI_MMBA (PCI_MAPREG_START + 0x04)
#define VIC_PCI_BAR PCI_MAPREG_START /* Base Address Register */
#define WPI_PCI_BAR0 PCI_MAPREG_START
ioh_valid = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_MEM_TYPE_64BIT, 0,
v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START,
int bar = PCI_MAPREG_START, signal, t_trust;
PCI_MAPREG_START + 0x04);
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x04, memtype, 0,
for (r = PCI_MAPREG_START; r < PCI_MAPREG_END; r += sizeof(memtype)) {
for (r = PCI_MAPREG_START; r < PCI_MAPREG_END; r += sizeof(memtype)) {
#define NHI_BAR PCI_MAPREG_START
io->pi_reg < PCI_MAPREG_START ||
i = (io->pi_reg - PCI_MAPREG_START) / 4;
PCI_MAPREG_START + (i * 4));
PCI_MAPREG_START + (i * 4), pd->pd_map[i]);
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
#define NMAPREG ((PCI_MAPREG_END - PCI_MAPREG_START) / \
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
if (reg < PCI_MAPREG_START ||
if (reg < PCI_MAPREG_START ||
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
PCI_MAPREG_START + 0x14) == 0) {
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
reg_start = PCI_MAPREG_START;
bar = PCI_MAPREG_START + 4 * i;
#define PUC_PORT_BAR_INDEX(bar) (((bar) - PCI_MAPREG_START) / 4)
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &pwdog->iot,
if (bar < PCI_MAPREG_START || bar > PCI_MAPREG_PPB_END) {
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
#define NMAPREG ((PCI_MAPREG_END - PCI_MAPREG_START) / \
reg = PCI_MAPREG_START + i * 4;
type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, type, 0,
for (r = PCI_MAPREG_START; r < PCI_MAPREG_END; r += sizeof(memtype)) {
#define SDHC_PCI_BAR_START PCI_MAPREG_START
for (bar = PCI_MAPREG_START; bar < end; bar += 0x4) {
if (pci_read(bus, dev, func, PCI_MAPREG_START, ®) != 0)
PCI_MAPREG_START, reg);
bar_reg_idx = (PCI_MAPREG_START + (bar_ct * 4)) / 4;