Symbol: PCIE_PU_ADDR_CLK_CFG
sys/arch/riscv64/dev/smtcomphy.c
210
val = HREAD4(sc, PCIE_PU_ADDR_CLK_CFG(lane));
sys/arch/riscv64/dev/smtcomphy.c
212
HWRITE4(sc, PCIE_PU_ADDR_CLK_CFG(lane), val);
sys/arch/riscv64/dev/smtcomphy.c
216
if (HREAD4(sc, PCIE_PU_ADDR_CLK_CFG(0)) & PLL_READY)
sys/arch/riscv64/dev/smtcomphy.c
229
val = HREAD4(sc, PCIE_PU_ADDR_CLK_CFG(0));
sys/arch/riscv64/dev/smtcomphy.c
232
HWRITE4(sc, PCIE_PU_ADDR_CLK_CFG(0), val);
sys/arch/riscv64/dev/smtcomphy.c
249
val = HREAD4(sc, PCIE_PU_ADDR_CLK_CFG(lane));
sys/arch/riscv64/dev/smtcomphy.c
252
HWRITE4(sc, PCIE_PU_ADDR_CLK_CFG(lane), val);