sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

316

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

302

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

287

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

327

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

2305

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

2308

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

2334

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

2354

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_gfx.c

2357

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/cikd.h

233

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3715

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3747

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3773

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3800

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4003

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4016

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4049

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4097

ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4339

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6385

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6388

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6396

PACKET3(PACKET3_SET_CONTEXT_REG,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6408

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6412

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6415

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6418

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6435

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8650

header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8652

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8697

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8702

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8720

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8760

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8776

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8790

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8799

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8810

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8843

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8853

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8926

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8962

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8983

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8992

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9020

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9487

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9506

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9792

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9833

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9891

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9931

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

360

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3629

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3632

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3640

PACKET3(PACKET3_SET_CONTEXT_REG,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3652

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3656

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3659

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3674

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

396

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

428

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

455

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

518

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

531

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

557

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

582

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5888

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5933

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5938

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5956

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5996

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6012

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6032

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6041

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6065

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6075

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6110

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6138

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6145

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_Q_PREEMPTION_MODE, 7));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6248

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6269

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6278

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6306

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

635

ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6769

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7184

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7227

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7282

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7323

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

872

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

295

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

330

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

362

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

388

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

433

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4422

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4445

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4463

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4501

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4517

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4531

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4540

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4564

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4574

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4641

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4670

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

470

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5070

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5089

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5098

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

523

ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5480

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5528

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5566

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1867

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1886

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1897

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1900

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1909

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1929

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1934

header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1936

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1974

ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2082

amdgpu_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2090

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2104

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2111

PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2119

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2122

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2125

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2358

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2370

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2372

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2385

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2396

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2400

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2402

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2412

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2936

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3003

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3494

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2045

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2088

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2101

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2105

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2131

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2143

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2175

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2214

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2219

header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2221

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2254

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2259

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2284

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2313

ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2481

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2487

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2490

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2498

PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2506

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2511

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2514

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2517

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3112

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3124

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3126

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3155

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3168

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3172

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3174

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3184

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3897

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3968

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3976

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3984

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3992

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4867

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4879

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4911

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4945

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1235

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1529

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1535

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1541

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1549

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1555

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1561

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1567

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1575

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1581

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1587

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1593

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

1601

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4151

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4154

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4162

PACKET3(PACKET3_SET_CONTEXT_REG,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4172

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4177

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4180

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4184

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4331

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4345

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4773

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5123

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5131

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5139

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5147

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6021

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6034

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6038

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6052

header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6054

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6094

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6099

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6119

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6133

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6154

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6173

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6186

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6213

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6233

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6242

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6253

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6285

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6295

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6311

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6340

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6737

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6750

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6847

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6893

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6928

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7138

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7171

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

850

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

891

ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1016

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1035

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1163

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1177

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1207

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1247

ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3345

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3348

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3356

PACKET3(PACKET3_SET_CONTEXT_REG,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3366

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3369

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3372

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3377

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4212

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4592

amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4690

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4697

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4704

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4712

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4718

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4725

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4732

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4740

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4746

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4753

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4760

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4768

ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5416

header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5418

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5527

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5532

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5553

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5603

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5644

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5653

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5664

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5682

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5780

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5802

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5834

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5843

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5859

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5887

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7090

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7167

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7343

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7345

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER_9_0, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7405

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7461

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7521

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7564

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

936

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

958

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

988

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

381

ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

389

ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

396

ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_2.c

404

ib->ptr[ib->length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

184

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

207

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

237

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

264

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

283

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2868

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2873

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2892

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2974

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2983

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2999

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3029

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3403

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

379

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

399

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

434

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4569

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4711

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4738

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

474

ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4782

.nop = PACKET3(PACKET3_NOP, 0x3FFF),

sys/dev/pci/drm/amd/amdgpu/nvd.h

52

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)

sys/dev/pci/drm/amd/amdgpu/sid.h

340

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)

sys/dev/pci/drm/amd/amdgpu/soc15d.h

54

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)

sys/dev/pci/drm/amd/amdgpu/vid.h

109

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)

sys/dev/pci/drm/radeon/cik.c

3464

radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/radeon/cik.c

3520

radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/radeon/cik.c

3549

radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/radeon/cik.c

3561

radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/radeon/cik.c

3588

radeon_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/pci/drm/radeon/cik.c

3619

radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));

sys/dev/pci/drm/radeon/cik.c

3625

radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/radeon/cik.c

3680

radeon_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));

sys/dev/pci/drm/radeon/cik.c

3727

radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/radeon/cik.c

3730

header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);

sys/dev/pci/drm/radeon/cik.c

3735

radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/radeon/cik.c

3741

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/cik.c

3748

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/radeon/cik.c

3789

ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);

sys/dev/pci/drm/radeon/cik.c

3990

radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/radeon/cik.c

3996

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/cik.c

3999

radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/radeon/cik.c

4006

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/cik.c

4010

radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/radeon/cik.c

4013

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/radeon/cik.c

5682

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/cik.c

5696

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/cik.c

5703

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6));

sys/dev/pci/drm/radeon/cik.c

5714

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/cik.c

5725

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/cik.c

5733

radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/radeon/cik.c

5746

radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/radeon/cik.c

6710

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/cik.c

6713

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/radeon/cik.c

6721

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/pci/drm/radeon/cik.c

6731

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/radeon/cik.c

6757

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/cik.c

6760

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/radeon/cik.c

8392

nop = PACKET3(PACKET3_NOP, 0x3FFF);

sys/dev/pci/drm/radeon/cik.c

8396

nop = PACKET3(PACKET3_NOP, 0x3FFF);

sys/dev/pci/drm/radeon/cikd.h

1695

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)

sys/dev/pci/drm/radeon/evergreen.c

2935

radeon_ring_write(ring, PACKET3(PACKET3_MODE_CONTROL, 0));

sys/dev/pci/drm/radeon/evergreen.c

2940

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/evergreen.c

2946

radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3));

sys/dev/pci/drm/radeon/evergreen.c

2953

radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/radeon/evergreen.c

3007

radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));

sys/dev/pci/drm/radeon/evergreen.c

3026

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/evergreen.c

3032

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/evergreen.c

3036

radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/radeon/ni.c

1385

radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/radeon/ni.c

1391

radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/radeon/ni.c

1407

radeon_ring_write(ring, PACKET3(PACKET3_MODE_CONTROL, 0));

sys/dev/pci/drm/radeon/ni.c

1412

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/ni.c

1418

radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/radeon/ni.c

1428

radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/radeon/ni.c

1534

radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));

sys/dev/pci/drm/radeon/ni.c

1552

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/ni.c

1558

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/ni.c

1562

radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/radeon/ni.c

2678

radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/radeon/ni.c

2688

radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/radeon/r100.c

940

radeon_ring_write(ring, PACKET3(PACKET3_BITBLT_MULTI, 8));

sys/dev/pci/drm/radeon/r600.c

2697

radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));

sys/dev/pci/drm/radeon/r600.c

2842

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/r600.c

2880

radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/radeon/r600.c

2886

radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/radeon/r600.c

2894

radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/radeon/r600.c

2899

radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/radeon/r600.c

2902

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/r600.c

2906

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/r600.c

2937

radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));

sys/dev/pci/drm/radeon/r600.c

2944

radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/radeon/r600.c

2991

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/r600.c

3002

radeon_ring_write(ring, PACKET3(PACKET3_CP_DMA, 4));

sys/dev/pci/drm/radeon/r600.c

3011

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/r600.c

3373

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/r600.c

3379

radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3));

sys/dev/pci/drm/radeon/r600.c

3386

radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/radeon/r600.c

3415

ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);

sys/dev/pci/drm/radeon/si.c

3357

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/si.c

3360

radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/radeon/si.c

3369

radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/radeon/si.c

3388

radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/radeon/si.c

3391

header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);

sys/dev/pci/drm/radeon/si.c

3396

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/si.c

3402

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/si.c

3409

header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);

sys/dev/pci/drm/radeon/si.c

3423

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/radeon/si.c

3426

radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/radeon/si.c

3548

radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));

sys/dev/pci/drm/radeon/si.c

3557

radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/radeon/si.c

3572

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/si.c

3578

radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/si.c

3582

radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/radeon/si.c

3585

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/radeon/si.c

5060

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/si.c

5075

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/si.c

5083

radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/radeon/si.c

5091

radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/radeon/si.c

5101

radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/radeon/si.c

5706

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/si.c

5709

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/radeon/si.c

5717

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/pci/drm/radeon/si.c

5727

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/radeon/si.c

5748

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/radeon/si.c

5751

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/radeon/sid.h

1599

#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)