sys/dev/pci/drm/i915/display/intel_dp_aux.c

630

return PCH_DP_AUX_CH_CTL(aux_ch);

sys/dev/pci/drm/i915/gvt/handlers.c

1099

else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_B)) ||

sys/dev/pci/drm/i915/gvt/handlers.c

1102

else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_C)) ||

sys/dev/pci/drm/i915/gvt/handlers.c

1105

else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_D)) ||

sys/dev/pci/drm/i915/gvt/handlers.c

1205

PCH_DP_AUX_CH_CTL(port_index) :

sys/dev/pci/drm/i915/gvt/handlers.c

2325

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,

sys/dev/pci/drm/i915/gvt/handlers.c

2327

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,

sys/dev/pci/drm/i915/gvt/handlers.c

2329

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

899

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

900

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_C), 6 * 4);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

901

MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_D), 6 * 4);