sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.c

206

ib->ptr[0] = PACKETJ(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.c

209

ib->ptr[i] = PACKETJ(0, 0, 0, PACKETJ_TYPE6);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

101

ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

103

ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

107

ring->ring[ptr++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE3);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

110

ring->ring[ptr++] = PACKETJ(0, 0, 0, PACKETJ_TYPE3);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

116

ring->ring[ptr++] = PACKETJ(0, 0, 0, PACKETJ_TYPE6);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

187

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

190

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

206

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

209

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

231

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

235

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_GPCOM_DATA1), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

239

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

243

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

247

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_GPCOM_CMD), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

251

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_GPCOM_CMD), 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE4));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

255

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

259

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

263

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

267

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

271

PACKETJ(0, 0, PACKETJ_CONDITION_CHECK3, PACKETJ_TYPE2));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

275

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

279

PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

283

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

306

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_VMID), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

313

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JPEG_VMID), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

317

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

321

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_64BIT_BAR_HIGH), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

325

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_IB_SIZE), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

329

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

333

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

337

PACKETJ(0, 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE2));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

341

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

345

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

349

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_STATUS), 0, PACKETJ_CONDITION_CHECK3, PACKETJ_TYPE3));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

361

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

365

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

369

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

374

PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE3));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

378

PACKETJ(0, 0, 0, PACKETJ_TYPE3));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

405

PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

410

PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

414

PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

426

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

45

ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

49

ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

52

ring->ring[(*ptr)++] = PACKETJ(0, 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

77

ring->ring[ptr++] = PACKETJ(0, 0, 0, PACKETJ_TYPE2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

99

ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_TYPE0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

466

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

470

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

484

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

488

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

508

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

512

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

516

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

520

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

524

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

528

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

532

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

536

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

540

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

561

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

565

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

573

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

577

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

581

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

585

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_IB_SIZE_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

589

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

593

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

597

amdgpu_ring_write(ring, PACKETJ(0, 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE2));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

600

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

604

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

608

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_STATUS_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

618

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

622

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

626

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

631

PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE3));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

634

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

659

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

664

PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

667

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

680

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

494

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

498

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

512

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

516

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

740

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

745

PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

761

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

766

PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

787

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

791

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

795

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

799

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

803

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

807

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

811

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

814

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

817

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

838

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

846

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

850

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

854

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

858

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_IB_SIZE_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

862

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

866

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

870

amdgpu_ring_write(ring, PACKETJ(0, 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE2));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

873

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

877

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

881

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_STATUS_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

897

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

901

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

905

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

910

PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE3));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

913

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

944

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

949

PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

952

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

965

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));