sys/arch/arm64/arm64/disasm.c

1240

{ SYSREG_ENC(1, 3, 7, 5, 1), OPE_XT, "ic\tivau" },

sys/arch/arm64/arm64/disasm.c

1241

{ SYSREG_ENC(1, 0, 7, 6, 1), OPE_XT, "dc\tivac" },

sys/arch/arm64/arm64/disasm.c

1242

{ SYSREG_ENC(1, 0, 7, 6, 2), OPE_XT, "dc\tisw" },

sys/arch/arm64/arm64/disasm.c

1243

{ SYSREG_ENC(1, 0, 7, 10, 2), OPE_XT, "dc\tcsw" },

sys/arch/arm64/arm64/disasm.c

1244

{ SYSREG_ENC(1, 0, 7, 14, 2), OPE_XT, "dc\tcisw" },

sys/arch/arm64/arm64/disasm.c

1245

{ SYSREG_ENC(1, 3, 7, 10, 1), OPE_XT, "dc\tcvac" },

sys/arch/arm64/arm64/disasm.c

1246

{ SYSREG_ENC(1, 3, 7, 11, 1), OPE_XT, "dc\tcvau" },

sys/arch/arm64/arm64/disasm.c

1247

{ SYSREG_ENC(1, 3, 7, 14, 1), OPE_XT, "dc\tcivac" },

sys/arch/arm64/arm64/disasm.c

1248

{ SYSREG_ENC(1, 3, 7, 4, 1), OPE_XT, "dc\tzva" },

sys/arch/arm64/arm64/disasm.c

1249

{ SYSREG_ENC(1, 0, 7, 8, 0), OPE_XT, "at\ts1e1r" },

sys/arch/arm64/arm64/disasm.c

1250

{ SYSREG_ENC(1, 0, 7, 8, 1), OPE_XT, "at\ts1e1w" },

sys/arch/arm64/arm64/disasm.c

1251

{ SYSREG_ENC(1, 0, 7, 8, 2), OPE_XT, "at\ts1e0r" },

sys/arch/arm64/arm64/disasm.c

1252

{ SYSREG_ENC(1, 0, 7, 8, 3), OPE_XT, "at\ts1e0w" },

sys/arch/arm64/arm64/disasm.c

1253

{ SYSREG_ENC(1, 4, 7, 8, 0), OPE_XT, "at\ts1e2r" },

sys/arch/arm64/arm64/disasm.c

1254

{ SYSREG_ENC(1, 4, 7, 8, 1), OPE_XT, "at\ts1e2w" },

sys/arch/arm64/arm64/disasm.c

1255

{ SYSREG_ENC(1, 4, 7, 8, 4), OPE_XT, "at\ts12e1r" },

sys/arch/arm64/arm64/disasm.c

1256

{ SYSREG_ENC(1, 4, 7, 8, 5), OPE_XT, "at\ts12e1w" },

sys/arch/arm64/arm64/disasm.c

1257

{ SYSREG_ENC(1, 4, 7, 8, 6), OPE_XT, "at\ts12e0r" },

sys/arch/arm64/arm64/disasm.c

1258

{ SYSREG_ENC(1, 4, 7, 8, 7), OPE_XT, "at\ts12e0w" },

sys/arch/arm64/arm64/disasm.c

1259

{ SYSREG_ENC(1, 6, 7, 8, 0), OPE_XT, "at\ts1e3r" },

sys/arch/arm64/arm64/disasm.c

1260

{ SYSREG_ENC(1, 6, 7, 8, 1), OPE_XT, "at\ts1e3w" },

sys/arch/arm64/arm64/disasm.c

1262

{ SYSREG_ENC(1, 0, 8, 3, 1), OPE_XT, "tlbi\tvae1is" },

sys/arch/arm64/arm64/disasm.c

1263

{ SYSREG_ENC(1, 0, 8, 3, 2), OPE_XT, "tlbi\taside1is" },

sys/arch/arm64/arm64/disasm.c

1264

{ SYSREG_ENC(1, 0, 8, 3, 3), OPE_XT, "tlbi\tvaae1is" },

sys/arch/arm64/arm64/disasm.c

1265

{ SYSREG_ENC(1, 0, 8, 3, 5), OPE_XT, "tlbi\tvale1is" },

sys/arch/arm64/arm64/disasm.c

1266

{ SYSREG_ENC(1, 0, 8, 3, 7), OPE_XT, "tlbi\tvaale1is" },

sys/arch/arm64/arm64/disasm.c

1268

{ SYSREG_ENC(1, 0, 8, 7, 1), OPE_XT, "tlbi\tvae1" },

sys/arch/arm64/arm64/disasm.c

1269

{ SYSREG_ENC(1, 0, 8, 7, 2), OPE_XT, "tlbi\taside1" },

sys/arch/arm64/arm64/disasm.c

1270

{ SYSREG_ENC(1, 0, 8, 7, 3), OPE_XT, "tlbi\tvaae1" },

sys/arch/arm64/arm64/disasm.c

1271

{ SYSREG_ENC(1, 0, 8, 7, 5), OPE_XT, "tlbi\tvale1" },

sys/arch/arm64/arm64/disasm.c

1272

{ SYSREG_ENC(1, 0, 8, 7, 7), OPE_XT, "tlbi\tvaale1" },

sys/arch/arm64/arm64/disasm.c

1273

{ SYSREG_ENC(1, 4, 8, 0, 1), OPE_XT, "tlbi\tipas2e1is" },

sys/arch/arm64/arm64/disasm.c

1274

{ SYSREG_ENC(1, 4, 8, 0, 5), OPE_XT, "tlbi\tipas2le1is" },

sys/arch/arm64/arm64/disasm.c

1276

{ SYSREG_ENC(1, 4, 8, 3, 1), OPE_XT, "tlbi\tvae2is" },

sys/arch/arm64/arm64/disasm.c

1278

{ SYSREG_ENC(1, 4, 8, 3, 5), OPE_XT, "tlbi\tvale2is" },

sys/arch/arm64/arm64/disasm.c

1280

{ SYSREG_ENC(1, 4, 8, 4, 1), OPE_XT, "tlbi\tipas2e1" },

sys/arch/arm64/arm64/disasm.c

1281

{ SYSREG_ENC(1, 4, 8, 4, 5), OPE_XT, "tlbi\tipas2le1" },

sys/arch/arm64/arm64/disasm.c

1283

{ SYSREG_ENC(1, 4, 8, 7, 1), OPE_XT, "tlbi\tvae2" },

sys/arch/arm64/arm64/disasm.c

1285

{ SYSREG_ENC(1, 4, 8, 7, 5), OPE_XT, "tlbi\tvale2" },

sys/arch/arm64/arm64/disasm.c

1288

{ SYSREG_ENC(1, 6, 8, 3, 1), OPE_XT, "tlbi\tvae3is" },

sys/arch/arm64/arm64/disasm.c

1289

{ SYSREG_ENC(1, 6, 8, 3, 5), OPE_XT, "tlbi\tvale3is" },

sys/arch/arm64/arm64/disasm.c

1291

{ SYSREG_ENC(1, 6, 8, 7, 1), OPE_XT, "tlbi\tvae3" },

sys/arch/arm64/arm64/disasm.c

1292

{ SYSREG_ENC(1, 6, 8, 7, 5), OPE_XT, "tlbi\tvale3" }

sys/arch/arm64/arm64/disasm.c

1306

if (((op_sys_table[i].flags & OPE_XT) != 0) || (Rt != 31)) {