OUTW
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, bktr->capcontrol);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, bktr->capcontrol);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, bktr->capcontrol);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, bktr->capcontrol);
OUTW(bktr, BKTR_GPIO_DMA_CTL, INW(bktr, BKTR_GPIO_DMA_CTL) & ~FIFO_RISC_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, bktr->capcontrol);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_ENABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);
OUTW(bktr, BKTR_GPIO_DMA_CTL, FIFO_RISC_DISABLED);