Symbol: OTG_H_TIMING_DIV_BY2
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.c
327
OTG_H_TIMING_DIV_BY2, h_div);
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.h
241
SF(OTG0_OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_BY2, mask_sh),\
sys/dev/pci/drm/amd/display/dc/optc/dcn10/dcn10_optc.h
392
type OTG_H_TIMING_DIV_BY2;\
sys/dev/pci/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
175
OTG_H_TIMING_DIV_BY2, h_div_2);
sys/dev/pci/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
216
REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_BY2, 1);
sys/dev/pci/drm/amd/display/dc/optc/dcn30/dcn30_optc.h
283
SF(OTG0_OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_BY2, mask_sh),\