sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

399

REG_UPDATE(DP_DSC_CNTL, DP_DSC_MODE, dsc_mode == OPTC_DSC_DISABLED ? 0 : 1);

sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

361

REG_UPDATE(DP_DSC_CNTL, DP_DSC_MODE, dsc_mode == OPTC_DSC_DISABLED ? 0 : 1);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1879

tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1885

se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

541

OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

136

OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1093

OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

392

OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

886

OPTC_DSC_DISABLED, 0, 0);

sys/dev/pci/drm/amd/display/dc/link/link_dpms.c

900

OPTC_DSC_DISABLED, 0, 0);