Symbol: NUM_UCLK_DPM_LEVELS
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
1898
while (i < NUM_UCLK_DPM_LEVELS) {
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
3637
return vdd_dep_table_on_mclk->entries[NUM_UCLK_DPM_LEVELS - 1].vddInd + 1;
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
3663
if ((data->smc_state_table.mem_boot_level == NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
2528
PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_UCLK_DPM_LEVELS,
sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c
3594
PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_UCLK_DPM_LEVELS,
sys/dev/pci/drm/amd/pm/powerplay/inc/smu11_driver_if.h
425
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ];
sys/dev/pci/drm/amd/pm/powerplay/inc/smu11_driver_if.h
57
#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/powerplay/inc/smu9_driver_if.h
221
uint8_t MemVid[NUM_UCLK_DPM_LEVELS]; /* VID */
sys/dev/pci/drm/amd/pm/powerplay/inc/smu9_driver_if.h
222
PllSetting_t UclkLevel[NUM_UCLK_DPM_LEVELS]; /* Full PLL settings */
sys/dev/pci/drm/amd/pm/powerplay/inc/smu9_driver_if.h
223
uint8_t MemSocVoltageIndex[NUM_UCLK_DPM_LEVELS];
sys/dev/pci/drm/amd/pm/powerplay/inc/smu9_driver_if.h
50
#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/powerplay/inc/vega12/smu9_driver_if.h
313
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ];
sys/dev/pci/drm/amd/pm/powerplay/inc/vega12/smu9_driver_if.h
53
#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h
49
#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_arcturus.h
519
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h
589
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h
599
uint8_t FreqTableUclkDiv [NUM_UCLK_DPM_LEVELS ]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h
60
#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h
604
uint16_t MemVddciVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_navi10.h
605
uint16_t MemMvddVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
1045
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
1058
uint8_t FreqTableUclkDiv [NUM_UCLK_DPM_LEVELS ]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
1067
uint16_t MemVddciVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
1068
uint16_t MemMvddVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
1107
uint8_t UclkDpmPstates [NUM_UCLK_DPM_LEVELS]; // 4 DPM states, 0-P0, 1-P1, 2-P2, 3-P3.
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
64
#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
685
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
698
uint8_t FreqTableUclkDiv [NUM_UCLK_DPM_LEVELS ]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
707
uint16_t MemVddciVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
708
uint16_t MemMvddVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu11_driver_if_sienna_cichlid.h
747
uint8_t UclkDpmPstates [NUM_UCLK_DPM_LEVELS]; // 4 DPM states, 0-P0, 1-P1, 2-P2, 3-P3.
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_aldebaran.h
304
uint32_t FidTableUclk[NUM_UCLK_DPM_LEVELS]; //PPCLK_UCLK
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_aldebaran.h
305
uint8_t DidTableUclk[NUM_UCLK_DPM_LEVELS]; //PPCLK_UCLK
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1045
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1117
uint16_t ShadowFreqTableUclk[NUM_UCLK_DPM_LEVELS]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1121
uint8_t UclkDpmPstates [NUM_UCLK_DPM_LEVELS]; // 4 DPM states, 0-P0, 1-P1, 2-P2, 3-P3.
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1122
uint8_t FreqTableUclkDiv [NUM_UCLK_DPM_LEVELS ]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1124
uint16_t MemVmempVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1125
uint16_t MemVddioVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1405
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1568
uint32_t Mem_UpThreshold_Limit[NUM_UCLK_DPM_LEVELS]; // Q16
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1569
uint8_t Mem_UpHystLimit[NUM_UCLK_DPM_LEVELS];
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
1570
uint8_t Mem_DownHystLimit[NUM_UCLK_DPM_LEVELS];
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1054
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1117
uint16_t ShadowFreqTableUclk[NUM_UCLK_DPM_LEVELS]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1123
uint8_t UclkDpmPstates [NUM_UCLK_DPM_LEVELS]; // 4 DPM states, 0-P0, 1-P1, 2-P2, 3-P3.
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1124
uint8_t FreqTableUclkDiv [NUM_UCLK_DPM_LEVELS ]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1126
uint16_t MemVmempVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1127
uint16_t MemVddioVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1398
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1558
uint32_t Mem_UpThreshold_Limit[NUM_UCLK_DPM_LEVELS]; // Q16
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1559
uint8_t Mem_UpHystLimit[NUM_UCLK_DPM_LEVELS];
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h
1560
uint8_t Mem_DownHystLimit[NUM_UCLK_DPM_LEVELS];
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1144
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1145
uint16_t FreqTableShadowUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1219
uint8_t UclkDpmPstates [NUM_UCLK_DPM_LEVELS]; // 6 Primary SW DPM states (6 + 6 Shadow)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1220
uint8_t UclkDpmShadowPstates [NUM_UCLK_DPM_LEVELS]; // 6 Shadow SW DPM states (6 + 6 Shadow)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1221
uint8_t FreqTableUclkDiv [NUM_UCLK_DPM_LEVELS]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1222
uint8_t FreqTableShadowUclkDiv [NUM_UCLK_DPM_LEVELS]; // 0:Div-1, 1:Div-1/2, 2:Div-1/4, 3:Div-1/8
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1223
uint16_t MemVmempVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1224
uint16_t MemVddioVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1630
uint16_t FreqTableUclk [NUM_UCLK_DPM_LEVELS ]; // In MHz
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1812
uint32_t Mem_UpThreshold_Limit[NUM_UCLK_DPM_LEVELS]; // Q16
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1813
uint8_t Mem_UpHystLimit[NUM_UCLK_DPM_LEVELS];
sys/dev/pci/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h
1814
uint16_t Mem_DownHystLimit[NUM_UCLK_DPM_LEVELS];