NGBE_PX_RR_CFG
NGBE_WRITE_REG_MASK(hw, NGBE_PX_RR_CFG(i),
rxdctl = NGBE_READ_REG(hw, NGBE_PX_RR_CFG(i));
rxdctl = NGBE_READ_REG(hw, NGBE_PX_RR_CFG(i));
NGBE_WRITE_REG(hw, NGBE_PX_RR_CFG(i), rxdctl);
srrctl = NGBE_READ_REG_MASK(hw, NGBE_PX_RR_CFG(i),
NGBE_WRITE_REG(hw, NGBE_PX_RR_CFG(i), srrctl);
NGBE_WRITE_REG_MASK(hw, NGBE_PX_RR_CFG(i),
rxdctl = NGBE_READ_REG(hw, NGBE_PX_RR_CFG(i));
srrctl = NGBE_READ_REG(&sc->hw, NGBE_PX_RR_CFG(i));
NGBE_WRITE_REG(&sc->hw, NGBE_PX_RR_CFG(i), srrctl);
srrctl = NGBE_READ_REG(&sc->hw, NGBE_PX_RR_CFG(i));
NGBE_WRITE_REG(&sc->hw, NGBE_PX_RR_CFG(i), srrctl);
NGBE_WRITE_REG_MASK(hw, NGBE_PX_RR_CFG(i),
NGBE_WRITE_REG_MASK(hw, NGBE_PX_RR_CFG(i),
NGBE_WRITE_REG_MASK(hw, NGBE_PX_RR_CFG(i),
rxdctl = NGBE_READ_REG(hw, NGBE_PX_RR_CFG(i));