ASIC_IS_AVIVO
else if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
else if (ASIC_IS_AVIVO(rdev))
else if (ASIC_IS_AVIVO(rdev))
else if (ASIC_IS_AVIVO(rdev)) {
else if (ASIC_IS_AVIVO(rdev))
} else if (ASIC_IS_AVIVO(rdev)) {
} else if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev) &&
if (ASIC_IS_AVIVO(rdev)) {
if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id)
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev) &&
if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE4(rdev)) {
else if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (!ASIC_IS_AVIVO(rdev) || !rdev->bios || !handle)
if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom)
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (!ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
} else if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
if (!ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE6(rdev)) {
} else if (ASIC_IS_AVIVO(rdev)) {
ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
} else if (ASIC_IS_AVIVO(rdev)) {
} else if (ASIC_IS_AVIVO(rdev)) {
ASIC_IS_AVIVO(rdev) ?
} else if (ASIC_IS_AVIVO(rdev)) {
if (!ASIC_IS_AVIVO(rdev)) {
} else if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev) &&
} else if (ASIC_IS_AVIVO(rdev)) {
else if (ASIC_IS_AVIVO(rdev))
((vpos >= 0 && hpos < 0) || (hpos >= 0 && !ASIC_IS_AVIVO(rdev)))) {
(!ASIC_IS_AVIVO(rdev) ||
ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, &base);
if (!ASIC_IS_AVIVO(rdev)) {
if (rdev->is_atom_bios && (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom))
if (!ASIC_IS_AVIVO(rdev))
else if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
else if (ASIC_IS_AVIVO(rdev))
else if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev)) {
ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
if ((rdev->family >= CHIP_R200) && !ASIC_IS_AVIVO(rdev)) {
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))
if (ASIC_IS_AVIVO(rdev))