MMU_CMD_REG_W
bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages);
bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE);