MMSCH_V4_0_INSERT_DIRECT_WT

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

474

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

477

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

480

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

292

MMSCH_V4_0_INSERT_DIRECT_WT(tmp, lower_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

294

MMSCH_V4_0_INSERT_DIRECT_WT(tmp, upper_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

296

MMSCH_V4_0_INSERT_DIRECT_WT(tmp, ring->ring_size / 4);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1393

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1396

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1400

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1404

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1407

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1411

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1416

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1421

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1424

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1427

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1430

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1436

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1439

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1442

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1445

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1481

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1484

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1487

MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i,