sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

205

*cs++ = HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT;

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

381

*cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT;

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

402

*cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT;

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

138

gtt_offset | MI_FLUSH_DW_USE_GTT,

sys/dev/pci/drm/i915/i915_cmd_parser.c

354

.mask = MI_FLUSH_DW_USE_GTT,

sys/dev/pci/drm/i915/i915_cmd_parser.c

398

.mask = MI_FLUSH_DW_USE_GTT,

sys/dev/pci/drm/i915/i915_cmd_parser.c

435

.mask = MI_FLUSH_DW_USE_GTT,

sys/dev/pci/drm/i915/pxp/intel_pxp_cmd.c

40

*cs++ = I915_GEM_HWS_PXP_ADDR | MI_FLUSH_DW_USE_GTT;