Symbol: LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE_MASK
sys/dev/pci/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h
56200
#define LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE_MASK 0x10000000L
sys/dev/pci/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h
34109
#define LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE_MASK 0x10000000L
sys/dev/pci/drm/amd/include/asic_reg/nbio/nbio_7_2_0_sh_mask.h
101744
#define LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE_MASK 0x10000000L
sys/dev/pci/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h
3922
#define LC_CPM_CONTROL_1__TXCLK_RXP_CLK_EN_PORT_M_GATE_ENABLE_MASK 0x10000000L