sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1321

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

1324

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

2238

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

1846

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

6138

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

6837

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

5964

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

5199

#define JPEG_IH_CTRL__IH_VMID__SHIFT 0x3