Symbol: CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h
34
#define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
34
#define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h
34
#define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h
34
#define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
34
#define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
44
#define CG_DCLK_CNTL__DCLK_DIR_CNTL_EN__SHIFT 0x8