Symbol: CG_CLKPIN_CNTL_2__CLK_SPARE_MASK
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h
261
#define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
253
#define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h
251
#define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h
251
#define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
253
#define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
279
#define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000