Symbol: CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
260
#define CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT 0xa
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h
258
#define CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT 0xa
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h
260
#define CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT 0xa
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
260
#define CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT 0xa
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
288
#define CG_CLKPIN_CNTL_DC__XTALIN_SEL__SHIFT 0xa