Symbol: regUVD_SEMA_CMD_BASE_IDX
sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_6_0_offset.h
1201
#define regUVD_SEMA_CMD_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_0_offset.h
505
#define regUVD_SEMA_CMD_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h
507
#define regUVD_SEMA_CMD_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_5_offset.h
486
#define regUVD_SEMA_CMD_BASE_IDX 1