Symbol: regPHYPLLF_PIXCLK_RESYNC_CNTL
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h
77
#define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_1_6_offset.h
519
#define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_4_1_0_offset.h
106
#define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e